• The Xilinx® ISE™ 9.2i Service Pack 2 or higher
• ISE 9.2i IP Update 1

To perform a Simulation Only Evaluation:

• Start up the CORE Generator™ using either of the following two methods:
  • From ISE: Select Projects -> New Source -> IP (Coregen and Architecture Wizard)
  • From Windows: Select Programs -> Xilinx ISE 9.2i -> Accessories -> CORE Generator
• To access the core, double-click on the "Communication and Networking" folder in the left hand panel of the CORE Generator GUI, then double-click on the "Telecommunications" folder. The SPI-3 Physical Layer Core will appear in the right hand panel of the CORE Generator GUI.
• Double-click on the SPI-3 Physical Layer Core in the right hand panel to call up its IP customization GUI.
• Select the desired options for the core, then click on the Generate button.
• The following support files will be generated in your CORE Generator project directory:
  • .edn, .ngc, .veo, .vho, .xco, .xcp
  • <core_name>_flist.txt
  • a subdirectory named <user_core_name>
  • a <user_core_name>_release_notes.txt file in the <user_core_name> directory

[back to top]

• Generate a Full System Hardware Evaluation License
  The license will be emailed to you automatically. Install the license as directed by the included instructions
  
• Start up the CORE Generator using either of the following two methods:
  • From ISE: Select Projects -> New Source -> IP (Coregen and Architecture Wizard)
  • From Windows: Select Programs -> Xilinx ISE 9.2i -> Accessories -> CORE Generator
• To access the core, double-click on the "Communication and Networking" folder in the left hand panel of the CORE Generator GUI, then double-click on the "Telecommunications" folder. The SPI-3 Physical Layer Core will appear in the right hand panel of the CORE Generator GUI.
• Double-click on the SPI-3 Physical Layer Core in the right hand panel to display its IP customization GUI.
• Select the desired options for the core, then click on the Generate button.
• The following support files will be generated in your CORE Generator project directory:
  • .edn, .ngc, .veo, .vho, .xco, .xcp
  • <core_name>_flist.txt,
  • a <user_core_name>_release_notes.txt file in the <user_core_name> directory

[back to top]

For SPI-3 Physical Layer release notes, and known issues, please review the Master Release Notes Guide for Xilinx IP Cores

[back to top]

You can learn more about the Xilinx SPI-3 Physical Layer LogiCORE by visiting the SPI-3 Physical Layer Core product page.

[back to top]