Xilinx provides a Full System Hardware Evaluation of the UMTS/3GPP Turbo Convolutional Code Decoder and Encoder LogiCORE™ IP cores. The evaluation license key for these cores will enable you to parameterize, generate and instantiate this IP in your design. You will be able to perform functional and timing simulation and download and configure your design in hardware. The evaluation license allows for a bitstream to be generated. The resulting IP will be fully functional for 2-3 hours, after which it will cease to function. To restore the evaluation core's operation in your design you simply reconfigure the FPGA with the bitstream again.
Please note that the conditions of the Core Evaluation License Agreement apply toward your evaluation
of this core.
| Accessing Evaluation Files |
You must request and install a Full System Hardware Evaluation License.
This 90-day evaluation file is compatible with all versions of this LogiCORE IP. Downloading the latest IP update will insure that you always access the latest design files. |
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