Synfora, Inc.
Automatic Synthesis of C Algorithms to FPGA With Hand-Design Quality
PICO Express FPGA brings Synfora’s proven algorithmic synthesis technology to designs using Xilinx Virtex™ and Spartan™ FPGAs. System designers can express and simulate complex algorithms requiring hundreds of thousands of gates in untimed C. By exploring the design space, the designer can choose an optimal implementation, and then let the tools synthesize the C code efficiently into a Xilinx FPGA.
The PICO Express FPGA tool integrates with synthesis tools like Synplify and Xilinx XST, and with simulation tools like ModelSim, VCS, and NC-Verilog. The tool chain simplifies the creation of all of the information required for successful integration of an algorithm accelerator into a software platform. The tool creates RTL and SystemC models, testbenches, and a software driver for invoking the algorithm from system software.
The result is algorithm acceleration as good as can be achieved by hand, but with productivity increases as high as 20X having been demonstrated.
Below are more facts about Synfora:
Technology Brief
Overview of the technology
- Synthesis of untimed C algorithms with quality of results comparable to hand design
- Productivity increases of over 5-20X demonstrated
- Integrated with common synthesis and simulation tools
- Automatic generation of RTL, SystemC models, testbench, and software driver
- Capable of handling large, complex designs
- Design exploration for optimal implementation
- System-aware implementation
Language Backgrounder
Which languages are supported?
- Algorithms for synthesis are supported in untimed C
- Testbenches and other code are supported in C and C++
How is parallelization achieved?
- PICO Express FPGA provides parallelism at three levels: between tasks, within tasks, and between instructions
- At the task level, multiple frames or packets can be “in flight” at the same time, with the next task scheduled as early as possible
- Within the task, sequential loops will be parallelized; each loop is started as soon as possible
- Individual instructions are parallelized, with each instruction being scheduled as early as dependencies allow
Are multiple clock domains supported?
- Multiple clock domain support is planned
Level of Abstraction - How different is it from coding in HDL?
- Algorithms written in untimed C can be maintained strictly in their behavioral state
- No change to the code is required to change product families (for instance, from Spartan to Virtex FPGAs)
Is floating point operation supported?
- Floating point is not supported
Is an interface to Matlab supported?
- The C algorithm can be imported into MATLAB for simulation
Are standalone function libraries available?
- PICO Express FPGA uses Xilinx logic blocks, memory, XtremeDSP™ blocks, and other primitives to synthesize an efficient high-performance accelerator
What format is the synthesis output?
- PICO Express FPGA automatically generates all of the files necessary for FPGA implementation using standard synthesis and simulation tools and Xilinx ISE™ FPGA fitter tools
- PICO Express FPGA generates Verilog RTL, which can be synthesized and simulated in any tool that supports Verilog or mixed-Verilog/VHDL designs
- PICO Express FPGA generates a software driver for use in invoking the algorithm from within the higher-level system software
Quality of results / Optimization scenarios
- PICO Express FPGA provides quality of results comparable to – and sometimes better than – hand design
- Set-top box, camcorder, video, multimedia cell phone, wireless designs all within 5% better or worse resource usage than hand design
- 5-20X productivity improvement demonstrated
Simulation and debugging flows
- Fully automated verification flow, using test bench written in C or C++
- Simulation integrated and validated using ModelSim, VCS, and NC-Verilog
- Supports rich set of practical interface protocols for testing the interaction with other parts of the system
What is the learning curve?
- One to three days of training is sufficient to get started
- Experience will provide continued improvements in quality of results
Skill pre-requisite
- Knowledge of FPGA and hardware design and flows will improve results
- Experience with C programming
- High-level block understanding of algorithm to be implemented
- Working knowledge of software compilation and debugging environments
Suitability and Fit
Who is the target audience?
- System architects who want to write architectural models in C and use PICO Express FPGA’s automated design space exploration capabilities
- System engineers trying to implement critical value-added algorithms in a Xilinx FPGA as quickly as possible
- Hardware engineers trying to implement a software algorithm in a Xilinx FPGA as quickly and efficiently as possible
Which applications segments are targeted by this product?
- PICO Express FPGA is specifically intended for accelerating value-added algorithms within an embedded system
- Target application areas include video (H.264, MPEG), audio (MP3, WMA, AC3), image processing (JPEG), and wireless (802.11a/b/g).
What are the characteristics of the target application?
- Most platforms consist of primary IP (CPU, memory), other standard IP (busses, interfaces, etc.), and value-added algorithms
- PICO Express FPGA dramatically accelerates the implementation of the critical value-added algorithms in hardware
Main value proposition?
- Automatic synthesis of untimed C with the quality of hand design
- Significant productivity gains demonstrated
- Design space exploration for optimal implementation
- First-pass timing closure
- High integration allows easy adoption into existing tool flows
- Highest quality algorithmic engine synthesis available
How can you find out if your application is a good candidate for this tool methodology?
- Critical proprietary algorithms are written in untimed C
- The application can use the performance, power, and time-to-market advantages of an FPGA
Language and methodology limitations
- Pointers and dynamic memory allocation, recursion, and use of stdio are not supported
- Arrays used instead of pointers
- Structured code (no goto usage)
- No static, volatile declarations
- No floating point
- There are no methodology limitations
Successful deployment examples
Customer testimonials
Pricing
- A one-year term floating license costs $150,000.
- Contact info@synfora.com for more information
Xilinx Integration
Which Xilinx devices/architectures are supported?
- Virtex-5
- Virtex-4
- Spartan-3
Which Xilinx CPUs are supported?
- PowerPC® processor
- MicroBlaze™ soft processor
Is the Virtex-4 FX APU supported?
- Contact Synfora to discuss APU support
Inference of Xilinx Library components
- PICO Express FPGA automatically selects an optimal mix of Xilinx slices, XtremeDSP blocks, and other primitives
Benchmark studies targeting Xilinx
- HD video encoder/decoder (200K gates) met performance with 5% fewer resources than hand design, less than 2 months to design and verify
- High-performance video compression app (1M gates) met performance with same resources and design time as hand design, fewer designers with less expertise
- Multi-standard deblocking, deringing, chroma conversion algorithm met performance, same resources and design time as hand design, 75% fewer designers
- High-bandwidth 3G wireless baseband app (400K gates) met performance, same resources as hand design, 77% design time savings
- LDPC encoder for 802.11n (60K gates), 5% more resources than hand design, met performance plus added low-power low-frequency version at the same time, less than 1 month to design and verify
Flow integration with EDK/XPS, ISE, System Generator (Implementation)
- PICO Express FPGA is fully integrated with Synplicity and Xilinx XST logic synthesis tools and with Xilinx ISE place-and-route tools
Flow integration with EDK/XPS, ISE, System Generator (Simulation)
- PICO Express FPGA is fully integrated with the Xilinx ISE tools and with ModelSim, VCS, and NC-Verilog
Getting Started
How to get started
Design examples for various Xilinx boards
- Video filters, including edge detection; implemented using the Spartan-3E Display Development Kit
Kit availablility
(i.e. bundling of boards, software, examples for an integration out of the box experience)
- This will be available in the future
Design services / consultancy available?
- Synfora does not provide design consulting.
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