Fast Fourier Transform (FFT)
Bundled With:
ISE
产品类型:
Core
计划:
LogiCORE
Included with Xilinx ISE® Software. Fast Fourier Transform v6.0 Available Now.
产品详细资料
文档
支持器件系列
- Virtex-5 LX
- Virtex-5 LXT
- Virtex-5 SXT
- Virtex-4 FX
- Virtex-4 FX XA
- Virtex-4 LX
- Virtex-4 SX
- Virtex-II Pro
- Spartan-3A
- Spartan-3A DSP
- Spartan-3E
- Spartan-3E XA
- Spartan-3 XA
- Spartan-3
需求
- ISE 10.1 SP3 or higher
- ISE IP Update 10.1.3 or higher
The Fast Fourier Transform (FFT) is a fundamental building block used in DSP systems, with applications ranging from OFDM based Digital MODEMs, to Ultrasound, RADAR and CT Image reconstruction algorithms. Although its algorithm is quite easily understood, the variants of the implementation architectures and specifics are significant and are a large time sink for hardware engineers today.
The FFT v6.0 provides four different FFT architectures along with system level fixed point C-models, and reduces typical implementation time from between 3-6 months to the push of a button. It also provides users with the ability to make all the necessary algorithmic and implementation specific trade-offs demanded by both DSP algorithm and hardware engineers. These easily made trade-offs give users the ability to select the most resource and power efficient solutions for the specific point size and transform time needed for their application.
FFT v6.0 expands the focus on increased dynamic precision by increasing data and phase factor width support up to 34 bits and supporting IEEE single precision floating point data type. The floating point option is implemented by utilizing a higher precision fixed-point FFT internally to achieve similar noise performance to a full floating point implementation, which results in lower resource utilization.
New Features in v6.0
- Increased data and phase factor precision to 34 bits.
- IEEE single precision floating point support.
- Added support for Block floating point in the Pipelined, Streaming I/O architecture.
关键特性
- Performance reaching up to the 450 MHz maximum performance of Virtex-5 (-1) Solutions
- Performance reaching up to the 250 MHz maximum performance of Spartan-3A DSP (-4) Solutions
- Transform sizes from 8 to 65536 points with the option to be run-time programmable
- Four architectural implementation options providing the most area efficient implementation for a given data rate
- A fixed point bit-accurate C-Model to enable system level analysis of Xilinx FFT core.
- Algorithmic trade-offs: bit widths, type of scaling and rounding, enable a resource efficient implementation given the algorithmic constraints
- Implementation trade-offs: Type of memory, and DSP48 usage, enable users to achieve the correct balance of resources used and performance
- Run-time configurable forward or inverse operation and scaling schedule for scaled fixed point
- Efficient multi-channel implementations significantly save resources over multiple FFT implementations
- Programmable Cyclic Prefix Insertion for OFDM systems to in order to significantly reduce memory and area utilized.
- Instantaneous Latency and Resource Estimation of DSP48/MULT18x18 and BRAM allows rapid comparison between key trade-offs