The Virtex-II EasyPath solution offers a 99%+ fault test coverage.

A risk-free, flawless cost-reduction strategy is paramount to maintaining competitiveness in today’s cost-driven environment. The Virtex-II EasyPath™ solution brings not only lower costs but also a better product, with the industry’s leading test coverage.

Virtex-II EasyPath devices are identical to the corresponding FPGA. The only difference is in how they are tested – they are tested to your specific design only. Thus you get the full-feature set rather than “reduced ASIC” silicon, in a device that is fully pin-compatible and interchangeable with an FPGA.

The Virtex-II EasyPath solution offers a 25% to 80% cost reduction with production quantity deliveries (thousands of units) in as little as 8-10 weeks (Figure 1). Device part numbers are listed in Table 1.

Table 1 – Virtex Family EasyPath Devices

	Virtex-II EasyPath Devices
Virtex-II Family	XC2V3000, XC2V4000, XC2V6000, XC2V8000
Virtex-II Pro Family	XC2VP30, XC2VP40, XC2VP50, XC2VP70, XC2VP100, XC2VP125

Identical Silicon Conversion to a structured ASIC platform is not required. The design files used to generate a custom test program come directly from Xilinx Integrated Software Environment (ISE) software. You don’t need to invest engineering resources in annotating critical paths, generating test vectors, simulation, or verification.

The silicon is identical, so prototype approval is unnecessary. You can begin high-volume manufacturing quickly, with full production quantities. Thus, you can take all the time you need to test your design and make improvements using the Virtex™-II family before committing to full-volume production using Virtex-II EasyPath devices. Only the testing is different; the silicon is identical.

Time is Money The time gained by using the Virtex-II EasyPath solution enables you to focus valuable engineering time and resources on product feature improvements and new markets. As shown in Figure 2, a typical structured ASIC conversion requires many steps that involve direct customer engineering involvement. With EasyPath devices, no up-front ASIC software investment is required for conversion; turnaround is fast and easy because Xilinx creates the custom test program for you.

One of the limitations of the structured ASIC conversions offered by other PLD companies is the limitation of a reduced feature set when the design is converted from the prototype or initial production to high volumes. Fewer package types, I/Os, and RAM bits, as well as other features like DLLs, are available in the ASIC conversion.

Test Coverage Virtex-II EasyPath devices rely on the same patented technology as FPGAs for testing functionality and speed, providing full test coverage at percentages of 99%+, which is not achievable in structured ASICs (shown in Figure 3).

ASICs can typically achieve coverage between 95% and 97% using hundreds of test vectors and multiple scan chains. As ASICs grow in complexity, test issues become more acute and achieving adequate test coverage is more difficult. Iterating multiple vectors multiple times to guarantee coverage is costly and time-consuming. Plus, scan chains take silicon area and can slow the device operation.

Using multiple bitstreams, the Virtex-II EasyPath solution tests routing and logic resources with greater granularity and coverage, reaching deep inside the device to test resources that would be impossible to test using external test vectors.

This superior technology covers the corner case and virtually eliminates test escapes, which may become more prevalent as ASIC testing lags behind the complexity and density of newer, structured ASIC devices. This higher level of testing results in a better quality product shipped to customers than is available with many of today’s complex ASICs.

Testing FPGAs Virtex-II EasyPath device testing relies on the programmability and read-back capabilities of the FPGA fabric to insert control and observation points and to test the individual logic and routing resources and other complex structures, such as block RAMs and multipliers.

Used in FPGAs since their inception 20 years ago, this approach is scalable, does not require additional silicon area for scan chains, and does not penalize operating speed. Because Virtex-II EasyPath devices are tested identically to FPGAs for your specific designs, at-speed testing and logic resource and routing resource coverage are guaranteed.

A Better Test Methodology By carefully examining each of the resources used in your design, Xilinx proprietary test generation software determines what should be tested and what combination of tests to use, as shown in Figure 4.

Each type of resource is measured differently. Routing resources are tested using a source/load library that toggles the selected path (Figure 5). Combinations of Built-In Self-Tests (BISTs) are used for complex logic structures. Speed grades are guaranteed by using a patented rise-and-fall time measuring method that uses a loop and counter to provide highly accurate speed grade measurements.

Testing Routing Resources and BIST Because the FPGA fabric is reprogrammable, the test program uses a single bitstream to simultaneously test hundreds of routes. More complex circuits such as block RAMs, multipliers, and three-state buffers (TBUFs) require that BIST circuits (Figure 6) are instantiated using multiple bitstreams. These BIST circuits are based on industry-standard test structures that are identical to those used to test ASICs or any other complex logic.

Speed Grading Xilinx assigns Virtex-II EasyPath device speed grades the same as FPGAs, as shown in Figure 7. A patented speed binning circuit tests the transition rise-and-fall times. A loop, similar in concept to a ring oscillator, outputs to a counter. Various resources under test are placed in the middle of this loop.

The number of pulses generated in a specific time is directly related to the speed grade of a Virtex-II EasyPath device. Unlike a simple ring oscillator, these circuits are capable of precisely measuring both rise and fall times to guarantee precise transition times through the circuit under test.

Conclusion The Virtex-II EasyPath solution is easy, fast, and cost-effective. You can now spend more time in beta testing, ensuring that your system is bug-free and has all the required features, and swing directly into production without the need for prototype evaluations.

For more information about Virtex-II EasyPath devices, visit www.xilinx.com/easypath.

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