With a built-in EM solver, coupled transmission lines, S-parameter support, and IBIS I/O buffer models, HSPICE provides a comprehensive multi-gigabit signal integrity simulation solution.

The Xilinx Serial Tsunami Initiative has resulted in a host of multi-gigabit serial I/O solutions that offer reduced costs, simpler system designs, and scalability to meet new bandwidth requirements. Serial solutions are now deployed in a variety of electronic products across a range of industries. Reduced pin count, reduced connector and package costs, and higher speeds have motivated the trend towards serialization of traditionally parallel interfaces.

RocketIO™ multi-gigabit transceivers (MGTs), for example, offer tremendous performance and functionality for connecting chips, boards, and backplanes at gigabit speeds. Whether your application is InfiniBand™, PCI Express™, or 10 Gigabit Application Unit Interface (XAUI), RocketIO MGTs offer ideal interface solutions.

However, the transition from slow, wide synchronous parallel buses to multi-lane, multi-gigabit asynchronous serial channels introduces new physical and electrical design challenges that traditionally fall more into the realm of radio frequency (RF) design than digital I/O design. The physical characteristics of the signal channel must be known and carefully controlled to ensure proper performance. At such high data rates, you must take into account a long list of analog, RF, and electromagnetic effects to guarantee a working design.

Life in the Fast Lane
Reliable operation of multiple transmit and receive lanes running up to 3.125 Gbps requires special attention to power conditioning, reference clock design, and to the design of the lanes themselves. You must match the differential signal trace lengths to tight tolerances. A length mismatch of 1.4 mm will produce a timing skew of roughly 10 ps, which is appreciable at these data rates. You must carefully control trace impedances and keep reference planes intact to avoid mismatches and signal reflections. Spacing between lanes must be adequate to avoid crosstalk, but remain space-efficient.

Meeting these challenges requires using signal integrity (SI) simulations to uncover and help solve potential problems before fabrication. This is nothing new, but the trick is to now take into account several previously ignored factors that are detrimental to gigabit link design.

Consider the traces. Perhaps by now you’ve grown accustomed to using transmission lines in signal integrity simulations. But simple lossless, uncoupled transmission line models are just not good enough for MGT links. Frequency-dependent conductor and dielectric losses – especially in FR4 – are substantial and mandate a more sophisticated approach. Your basic gigabit trace is a differential coupled transmission line with considerable loss and must be treated as such to find optimal driver pre-emphasis settings.

To address these and other problems, HSPICE® provides a comprehensive set of SI simulation and modeling capabilities to help you achieve the necessary accuracy for multi-gigabit SI simulations. HSPICE includes:

• Built-in electromagnetic (EM) solver technology for trace geometries
• Lossy, coupled transmission line modeling with the W-element
• Single-ended and mixed-mode S-parameter modeling with the S-element
• I/O buffer modeling with I/O Buffer Information Specification (IBIS) models and encrypted netlists.

HSPICE includes a built-in electromagnetic field solver for computing the electrical characteristics of coupled transmission line systems. The solver is ideal for multilane, multi-gigabit applications. It uses a Green’s function boundary element and filament method that yields very accurate resistance, inductance, conductance, and capacitance (RLGC) matrices for the types of differential traces you’ll need for gigabit design. You need only perform a field solver analysis for each unique cross-sectional geometry.

HSPICE field solver analysis will produce a characterization of the interconnect system in terms of distributed RLGC matrices. Frequency-dependent loss effects are included in the Rs and Gd matrix elements. Be sure to enable these field solver options; at gigabit data rates these losses can be substantial.

The conductor losses ( ) and dielectric losses ( ) are both significant at 3.125 Gbps, and must be well modeled to determine your pre-emphasis needs for long lane lengths. Don’t guess when specifying your material properties. The relative dielectric constant (4.2-4.7 for FR4) will influence line impedance (C matrix) values; electrical conductivity (5.8e7 for copper) will show up as skin effect (R matrix) losses; and dielectric loss tangent values (typically 0.015-0.03 for FR4) will show up as substrate (G matrix) losses.

Fortunately, board manufacturers are getting better at measuring and sharing such information. Many accurate W-element RLGC matrix models are available directly from vendors. Be sure to verify that frequency-dependent Rs and Gd values are included to ensure that loss modeling was taken into account. HSPICE’s built-in EM solver is also well suited for copper cable geometries in cases where manufacturers do not have W-element models available.

Mixed-Mode Scattering Parameters
As shown in Figure 2, accurate SI simulation of multi-gigabit links involves a variety of models. For certain package, trace, connector, backplane, and cable sections, measured data or very accurate threedimensional EM solver data is often available in the form of scattering parameters (Figure 3).

S-parameters represent complex ratios of forward and reflected voltage waves. Used as an alternative to other frequency domain representations (such as Y- or Z-parameters), S-parameters lack the dramatic magnitude variations that other representations have associated with high-frequency resonance. In addition, they can be measured directly with vector network analyzers. With differential traces the norm for XAUI and other links, mixed-mode S-parameters are particularly useful. They provide a means to characterize a differential trace in terms of its differential, common-mode, and cross-coupled behavior.

HSPICE provides single-ended and mixed-mode S-parameter modeling capability through the S-element. You can input S-parameter data in Touchstone™ file, CITI file, or table formats. Make sure your S-parameter data covers as broad a frequency range as possible with good sampling. HSPICE will apply convolution calculations that need high-frequency values for crisp simulations of waveform rises and falls. If you have data up to 20 or 40 GHz, use it. A frequency range nine times your data rate (28 GHz for 3.125 Gbps) is considered optimal, although often hard to come by. Good low-frequency data (including DC) is also important for direct-coupled applications.

Beware of “measurement noise” with Sparameters. A poor network analyzer calibration can result in S-parameter data that will make your passive traces appear to have gain. HSPICE also supports S-parameter modeling for active devices, as is common with some RF/microwave designs. HSPICE uses a convolution algorithm for S-parameter modeling that is not limited to passive devices, avoiding the creation of intermediate, reduced-order models required by other time-domain simulation approaches. HSPICE uses the S-parameter response directly for maximum accuracy.

I/O Buffer Modeling
Ideally, you can perform SI simulations using transistor-level models and netlists for the input/output buffers. This level of detail may be unwieldy, but is sometimes necessary. The IBIS standard provides a means of encapsulating the key electrical characteristics of I/O buffers into accurate behavioral models. These models include data tables for buffer drive and switching ability, and package parasitic information. These models may or may not be appropriate for high-speed applications, depending on their intended use. Be sure to check the notes in the header of your IBIS model files to be sure you’re not pushing the model outside its range of validity. There is also a new IBIS Interconnect Modeling Specification (ICM) for exchanging Sparameter and RLGC matrix data for connectors, cables, packages, and other types of interconnects.

Another advantage of IBIS is that it allows vendors to deliver good buffer models to their customers without disclosing proprietary design information. This is also accomplished with encrypted HSPICE netlists. Multi-gigabit transceiver modeling is particularly difficult, so be prepared to see several buffer modeling approaches.

In the case of RocketIO transceivers, Xilinx provides special MGT models verified with HSPICE; visit the Xilinx Support SPICE Suite at www.xilinx.com/support/software/spice/spice-request.htm for more information. Whether you’re using IBIS, SPICE netlist, or encrypted buffer models, HSPICE provides the most comprehensive and validated solution available.

Don’t Skimp on the SPICE
So now you’ve got S-parameter models based on measured data, W-element trace models built from EM solvers, and accurate I/O buffer models. Are you ready to simulate? Maybe not. You may still be missing lumped R, L, and C values needed to capture all the parasitic effects in your design.

Are you using AC coupling capacitors? At gigabit frequencies, no passive component behaves completely as expected. Even coupling capacitors must be modeled as lumped RLC circuits to capture resonance effects. Using off-chip terminations? The same is true with resistors. Are you leaving out any package lumped RLC or S-parameter models? Thankfully, manufacturers are getting better at providing accurate SPICE models for most of their components. You just need to ask.

Conclusion
Multi-gigabit signal integrity simulations must take into account a great deal of previously ignorable effects. Every trace is a transmission line, and you must account for every bump, bend, turn, and millimeter of metal with appropriate electrical models.

HSPICE is constantly being improved to better address these accuracy needs for multi-gigabit SI simulation. The W-element has been enhanced for faster and more accurate modeling of frequency-dependent losses in coupled transmission lines. HSPICE’s built-in EM solvers can build accurate W-element models based on trace geometries (Table 1). The S-element has been enhanced to support both single-ended and mixed-mode S-parameter data sets. This, combined with HSPICE’s trustworthy device and IBIS models, provides a comprehensive signal integrity simulation and modeling solution.

Table 1 – Use HSPICE’s built-in EM solver to turn material properties and trace geometry specifications into accurate lossy, coupled transmission line models.

Use the Following Command:	To Specify Trace:
.MATERIAL	Conductor and dielectric properties
.SHAPE	Conductor geometries
.LAYERSTACK	Ground planes and dielectric thicknesses
.MODEL	W-element model derived from the field solver analysis

For more information about the latest capabilities of HSPICE and the integration of HSPICE into overall design processes, visit the HSPICE Update page at www.hspice.com.

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