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There has been a strong push in the past
few years to replace analog radio systems
with digital radio systems. The
Department of Defense Joint Tactical
Radio System program shifted the emphasis
on the development of software-defined
radio (SDR) to the forefront of research
and development efforts in the defense,
civilian, and commercial fields.
Although it has existed for many years,
SDR technology continues to evolve
through newly funded ventures. The holy
grail of SDR is its promise to solve incompatible
wireless network issues by implementing
radio functionalities as software
modules running on generic hardware platforms.
Future SDR platforms will comprise
hardware and software technologies that
enable reconfigurable system architectures
for wireless networks and user terminals.
Although new SDR-based systems are
purported to be highly reconfigurable and
reprogrammable right now, the truth is
that SDR hardware platforms are still in
their early development stages. Many issues
must still be resolved, including reconfigurable
signal processing algorithms, hardware
and software co-design
methodologies, and dynamically reconfigurable
hardware. Overall, the main key
issues for SDR embedded system platforms
are flexibility, expandability, scalability,
reconfigurability, and reprogrammability.
Meeting the Challenge
SDR is characterized by a decoupling
between the heterogeneous execution platform,
based on hardware functions together
with DSP and MCU processors, and the
applications through abstraction layers.
One of the approaches for meeting the
complexity demands of third-generation
systems is to use multi-core systems where
a DSP and a microcontroller work together
with an FPGA-based hardware coprocessor.
With its embedded IBM
PowerPC, the Xilinx® Virtex-II Pro
FPGA is rapidly becoming a solution that
embeds and tightly couples reconfigurable
logic and a processor in the same device.
Sundance, a developer of advanced system
architectures for high-performance signal
processing applications, has focused on
designing FPGA-based development platforms
that address an SDR OEMs wish
list. Our challenge was to design a system
that would provide the scalability SDR systems
require.
The Embedded System Controller
The SMT148 (Figure 1) is one of many
development systems Sundance has
launched recently. Aimed specifically at
SDR, the SMT148 is a fully configurable
and expandable waveform development
environment that meets the many requirements
of SDR developers. This entry-level,
stand-alone system enables radio designers
to investigate and experiment with the many configurations
of multi-channel software
programmable
and hardware-configurable
digital radio.
The SMT148 has
at its heart a powerful
embedded system
controller that leverages
the Xilinx Virtex-
II Pro FPGA with its
embedded PowerPC
405 processor (Figure 2). As an embedded
system controller, the
role of the Virtex-II
Pro device is to manage
the reconfiguration
of the add-on modules, especially
when downloading. Reconfiguration means
switching between modes or updating a
hardware/software component.
In the global functioning of the
SMT148, you can download many kinds of
software (high-level applications, protocol
stacks, low-level signal processing algorithms)
and employ several methods to download software. The eight RocketIO
transceivers on the Virtex-II Pro device
enable high-speed data transfer to additional
SMT148 or Virtex-II Pro add-on modules.
Downloads can leverage a powerful I/O
architecture that includes the popular
FireWire, USB interfaces, LVDS interfaces,
and JTAG for debugging and downloads.
Data flows into the FPGA and is managed
by a Sundance program written for the
embedded PowerPC before processing.
Figure 3 is the C code comprising the data
flow and RocketIO PowerPC program.
Scalable, Reconfigurable Embedded Processors
Scalability is addressed through four addon
module sites, and you can partly resolve
the requirements of dynamic reconfiguration
by adding additional Xilinx-based
FPGA modules. All add-on modules communicate
through the Virtex-II Pro device,
which also manages two 32-bit microcontrollers
that enable communications with
most widely used standards.
With the RocketIO transceivers connected
to differential pair connectors, you
can connect FPGA systems directly through simple cable connections supporting
more than 2 Gbps data rates.
The SMT148 leverages the Xilinx
Virtex-II Pro block RAM configuration to
generate FIFOs for the RocketIO transceivers,
add-on modules communication
ports, and a high-speed bus, as well as the
embedded PowerPC code. The single highspeed
bus allows parallel data transfer to
and from a wide range of high-speed
ADC/DAC modules.
Data rates on this port are in excess of
100 MHz (400 Mbps), and are useful for
transferring sampled 16-bit I and Q.
Processing data streams can take place
either in the embedded PowerPC in the
Virtex-II Pro device or throughout an
array of other add-on Virtex-II Pro FPGAbased
modules with embedded PowerPC.
The FPGA on the SMT148 carrier
card is connected to many different
devices and therefore has many internal
interfaces that allow it to exchange data or
commands with the external world. All
interfaces are reset at power on when
applying a manual reset. Figure 3 shows
the interconnections between the digital
modules inside the FPGA.
When we designed the SMT148, we
understood that one of the many challenges
OEMs would face in developing
JTRS-compliant platforms was the availability
of interchangeable and networked
processing nodes. The availability of processing
nodes aims to meet the expandability
and scalability requirements in complex
waveform applications.
The SMT148 meets this availability challenge
with a network of daughter sites that
you can use for additional resources such as
signal processors, reconfigurable computing
modules, and Sundances large family of addon
modules. These add-on modules include
a variety of embedded system options such as
reconfigurable modules with tightly coupled
Virtex-II Pro FPGAs and DSPs, digital and
analog converters, data conversions, transceivers,
and I/Os of all types.
Designed for Developers
Powered by an external supply, the
SMT148 platform has an impressive topology
that accepts input signals from various
sources through a network of multi-pin
connectors. High-speed I/O channels support
the additional nodes in a network
topology neatly harmonized to the Xilinx
architecture.
Fully interconnected and configurable
through their communication ports, these
add-on sites are also connected to the
embedded Virtex-II Pro FPGA. The availability
of a network of add-on sites removes
the main expandability restrictions often
associated with other platforms, and offers
the OEMs a highly compact design and
development tool.
More importantly, this scalable
system architecture makes the
SMT148 a perfect development platform
with which to resolve the many
issues related to the implementation
of multiple radio functionalities in a
single environment. These can be
addressed as multiple software modules
running on Sundances reconfigurable
hardware platform.
IP Cores
Sundance takes advantage of the
high-performance DSP acceleration
capabilities and flexible connectivity
that the Virtex-II Pro FPGA provides
by supporting developers with a family
of software tools and IP cores.
The SMT148 I/O flexibility
enables you to rapidly investigate and
experiment with features of the
Virtex-II Pro FPGA as well as those of
developed IP cores from Sundance.
These include multi-tap complex filters,
Viterbi decoders, encoders, a
complete transmitter, QAM mapper, multiphase
pulse shaping filter, multi-phase cascaded
integrator comb (CIC) interpolation
filter with a fixed interpolation rate, multi-phase
numerical-controlled oscillator
(NCO), and multi-phase digital mixer.
Conclusion
Developing, testing, and implementing
SDR IP cores is simplified with the
Sundance SMT148 platform. You can
now focus on developing additional IPs
without worrying about peripheral processing
or I/O devices, as these are simply
off-the-shelf add-on IP blocks.
For more information, please visit www.sundance.com.
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