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Home : Documentation : Xcell Journal Online : Article
Design Leadership from Xilinx



by Bruce Talley, Vice President, Design Software Division, Xilinx, Inc.
bruce.talley@xilinx.com (4/18/05)


The shortest path from design start to project finish is through Xilinx 7.1i design tools.
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Article PDF 220 KB


It’s a good time to be an FPGA or CPLD designer. The high cost of ASIC-based projects and the high risk of structured ASIC designs are enabling more advanced features with every new generation of silicon. But without easy-to-use, productive design tools, all of that power is still just silicon waiting to be unleashed.

Xilinx® ISE™ software has long been known to deliver some of the fastest logic in programmable design, but the ISE design suite also delivers ease-of-use at the lowest cost possible. With the addition of advanced options like PlanAhead™ design and analysis software and ChipScope™ Pro real-time FPGA debug, the complete ISE system delivers solutions to design bottlenecks and gets you to project completion faster.

In this issue of the Xcell Journal, we present a series of articles about design tools and design applications to help you explore the new offerings behind the our 7.1i design tools release, from a general overview of ISE 7.1i software to detailed third-party explorations of logic analyzer setup and debug for FPGAs.

Table of Contents
Design Performance Leaps Forward with ISE 7.1i Software
Debugging with Combined Oscilloscope and Logic Analyzer Measurements
Real-Time Debug That Dominates
Integrating MATLAB Algorithms into FPGA Designs
Complex FPGAs Require Equivalence Checking
Complete FPGA and CPLD Power Analysis
Increase Performance and Lower Cost Through System Design
Control Your Designs with the PlanAhead Hierarchical Design and Analysis Tool
Building High-Performance Measurement and Control Systems with FPGAs

Printable PDF version of this article with graphics. PDF logo (4/18/05) 220 KB

 
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