| 问答编号# | 32519 |
| 型号 | SW-MAP |
| 最后更新日期 | 2009-04-23 00:00:00.0 |
| 记录状态 | Active |
| 关键词 | INFO:Map:91, RLOC, hierarchy, RPM |
Keywords: INFO:Map:91, RLOC, hierarchy, RPM
I am seeing the following message related to some RLOC constraints in my design. I am not too concerned about the RLOC constraints being ignored, but the message seems to be saying that the entire module is being ignored by MAP. Is this true?
INFO:Map:91 - fp_multiplier symbol
"apu_fpu_virtex5_0/apu_fpu_virtex5_0/gen_apu_fpu_dp_hi.netlist/fpu_multiplier
" has an RLOC attribute and will be ignored since it is on a hierarchical
block not directly recognized by map. This may be caused by an error in the
Xilinx library expansion for the symbol or by a third-party vendor
incorrectly expanding the symbol.