| 问答编号# | 33730 |
| 型号 | SW-ISE Simulator |
| 最后更新日期 | 2009-11-17 00:00:00.0 |
| 记录状态 | Active |
| 关键词 | HDLCompiler:597, HDLCompiler:778 |
Keywords: HDLCompiler:597, HDLCompiler:778
When I attempt to define generics and their values during compile time using the -generic_top switch, as follows:
fuse -prj my.prj work.glbl work.ext_tb_CIO -L unisims_ver -generic_top "RL_MRS_BURST_LENGTH=3" -generic_top "RL_MRS_CONF=3" -o mytb_Conf3_BL8.exe
This results in the following compiler error:
"ERROR:HDLCompiler:597 - "C:/Xilinx/11.1/ISE/verilog/src/glbl.v" Line 5: Module glbl does not have a parameter named RL_MRS_BURST_LENGTH"
"ERROR:Simulator:778 - Static elaboration of top level Verilog design unit(s) in library work failed"
How can I resolve this error?