问答 #33839 - SP605 - Known Issues and Release Notes Master Answer Record
SP605 - Known Issues and Release Notes Master Answer Record
| 问答编号# | 33839 |
| 专题 | Boards |
| 最后更新日期 | 2010-02-01 03:02:31.0 |
| 记录状态 | Active |
| 器件 | - |
| 设计工具 | - |
| IP | - |
| 开发板与电缆 | Spartan-6 FPGA SP605 Evaluation Kit;Spartan-6 FPGA Connectivity Kit;Spartan-6 FPGA Embedded Kit |
疑问描述
This Answer Record is intended to list all known issues with the SP605 Evaluation Kit.
解决方案
Q.1: Where can I find preliminary information for the SP605 board?
A.1: See (Xilinx Answer 33610).
Q.2: Spartan-6 FPGA MCB - Spartan-6 FPGA Memory Controller User Guide (UG388) incorrectly states that MIG automatically outputs files for the SP601 and SP605 reference boards.
A.2: See (Xilinx Answer 33417).
Q.3: 11.3 CORE Generator - Why am I unable to select the -3 speed grade for the PCIe core generation for the Spartan-6 FPGA xc6slx45t part that is on the SP605 board?
A.3: See (Xilinx Answer 33665).
Q.4: SP601 - HyperTerminal does not automatically detect USB UART Bridge.
A.4: See (Xilinx Answer 33319).
Q.5: Development Boards - Where can I find the USB UART driver?
A.5: See (Xilinx Answer 33569).
Q.6: SP605: Change in resistor network values on the MGT_AVcc rail
A.6: See (Xilinx Answer 34093).
Q.7: 11.x ChipScope - IBERT - Spartan-6, Virtex-5, Virtex-6 - PCS loopback results in an increasing error count
A.7: See (Xilinx Answer 34203).