Recorded Lecture: Memory and Clocking Resources

Duration: about 30 mins.

The Basic FPGA Architecture: Memory and Clocking Resources REL satisfies one of the three required prerequisites for the Fundamentals of FPGA Design course. It is offered at no charge.

After completing this training, you will be able to:

• Identify the basic memory and clocking resources of the Virtex-5 FPGAs
• List the dedicated resources of the Virtex-5 FPGAs
• List some of the differences between Spartan-3 and Virtex-5 FPGAs

Launch