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Embedded System Design Flow on Zynq using Vivado

Course Description	This course provides professors with an introduction to embedded system design flow on Zynq using ZedBoard and Xilinx Vivado® design software suite.
Level	Introductory
Duration	2 Days
Who should attend?	Professors who are familiar with Xilinx All Programmable technology and wish to get up to speed with SoC-based embedded systems design using Zynq.
Pre-requisites	Digital logic and FPGA design experience Basic experience with Xilinx Vivado design software suite Basic understanding of C programming Basic microprocessor experience

Skills Gained

After completing this workshop, you will be able to:

Rapidly architect an embedded system targeting the ARM processor of Zynq located on ZedBoard using Vivado and IP Integrator
Extend the hardware system with Xilinx provided peripherals
Create a custom peripheral and add it to the system
Write a software application to access peripherals
Perform IP-level Bus Functional simulation verification

Day 1:

Introduction to Embedded System Design using Zynq
Lab 1: Simple Hardware Design
- Create a Vivado project and use IP Integrator to develop a basic embedded system for a target board.
Zynq Architecture
Extending the Embedded System into Programmable Logic
Lab 2: Adding Peripherals in Programmable Logic
- Extend the hardware system by adding AXI peripherals from the IP catalog.
Adding Your Own IP Peripheral
Lab 3: Creating and Adding Your Own Custom IP
- Use the Manage IP feature of Vivado to create a custom IP and extend the system with the custom peripheral.

Day 2:

Software Development Environment
Lab 4: Writing Basic Software Applications
- Write a basic C application to access the peripherals.
Software Development and Debugging
Lab 5: Software Debugging Using SDK
- Use API to drive CPU's timer. Perform software debugging using SDK.