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Adaptive Computing


Your source for Adaptive Computing announcements, customer success stories, industry trends, and more.


Hardware designers building embedded applications have long made difficult tradeoffs, balancing cost, I/O count, and logic density requirements with the need to achieve fast time-to-market. We’re excited to announce a solution that renders those tradeoffs obsolete: the new AMD Spartan™ UltraScale+™ FPGA low-cost family, which offers high I/O-to-logic-cell ratios, low power, and state-of-the-art security features in a small form factor.

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Hamid_Salehi
Staff
Staff

Today, Wormhole, a leading blockchain interoperability platform, is collaborating with AMD to make FPGA hardware accelerators available to the Wormhole ecosystem. By increasing the accessibility of accelerators to blockchain developers, this collaboration aims to make a meaningful difference in accelerating trust and value transfer in permissionless environments. AMD will also lend its deep expertise in hardware acceleration to help deliver speed and scalability to multichain applications being built with Wormhole.

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AMD FPGAs and Adaptive SoCs are the first in the industry to conform to the new DisplayPort™ 2.1 Audio/Video Standard for 8K Ultra-HD Video

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The Pro AV, Broadcast, and Residential markets are rapidly adopting advancements in immersive, adaptive, and intelligent AV technology. This creates a growing need for enhanced bandwidth, low-latency video processing, and compression capabilities, with the ability to differentiate through audio and video quality improvements and features.

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As designs get more complex, AMD is continuing to innovate—ensuring that system architects and developers have the tools they need to efficiently develop mixed-domain designs that include both the processing subsystem and the FPGA fabric.
Today, I am pleased to announce the Vitis™ unified software platform 2023.2 release, offering a singular environment to facilitate the streamlined design, simulation, and implementation of high-performance designs using AMD adaptive SoCs and FPGAs.
Our latest release unleashes new functionality, such as a standalone tool for embedded C/C++ design, a new unified GUI, and a host of enhancements to simplify the use of AMD Versal™ adaptive SoCs with AI Engines (AIEs).

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Bringing new adaptive SoC and FPGA designs to market quickly in an increasingly complex and competitive environment requires hardware designers and system architects to explore new ways of working more efficiently. The AMD Vivado™ Design Suite provides an easy-to-use development environment with powerful tools to accelerate the implementation of large adaptive SoCs and FPGAs.
Today, I’m excited to share details about the 2023.2 release of Vivado Design Suite, which offers even more advantages to designers looking to reach target Fmax fast, accurately estimate power requirements before implementation, and easily meet design specifications.
  

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Dave_Peascoe
Staff
Staff

Back in April of 2023 we announced the AMD Alveo™ MA35D media accelerator to much fanfare, if you’re not yet up to speed on that, or you just want to relive the excitement, you can find the announcement here. After showcasing our newest accelerator at the NAB (National Association of Broadcasters) Show, we were able to realize the culmination of years of learnings, planning, and good old-fashioned hard work in launching the industry’s first 5nm ASIC-based media accelerator, purpose-built for interactive streaming at scale. With that we are pleased to announce the expansion of the Alveo Media Acceleration portfolio alongside the AMD Alveo™ U30. With the launch and early-access program now behind us, it’s time to really get started.

 

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AMD extends its leadership in radiation-tolerant, space-grade adaptive compute solutions with the announcement of the Versal™ AI Edge XQRVE2302 

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Inverter control for electric vehicle (EV) charging stations, sensor fusion for handheld medical devices, motor control for power generation systems, public transportation, autonomous multi-axis industrial robots, and medical equipment.

Digital signal processing (DSP)-intensive applications at the edge all have unique requirements. Among those requirements is the need to meet the space and power constraints of the edge and adapt to constant changes. At the same time, embedded system architects and application developers are under pressure to move fast and simplify processes, whether in design, manufacturing, getting to market, or ongoing product management.

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Across industries and around the globe, cutting-edge technologies require the rapid processing and transmission of vast amounts of data. Wired communications need infrastructure that can support an explosion of network traffic, which will only grow with the introduction of 800G Ethernet and beyond. In the data center, powerful recommendation engines and FinTech software require quick analysis of large data sets. And test engineers can never get enough compute power as they chase blazing-fast, next-generation protocol standards.

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