Artix 7 35T Arty FPGA Evaluation Kit

by: AMD

The $159 Arty Evaluation Kit enables a quick and easy jump start for embedded applications ranging from compute-intensive Linux based systems to light-weight microcontroller applications. Designed around the industry’s best low-end performance per-watt Artix 7 35T FPGA from AMD. Arty kit features the AMD MicroBlaze Processor customizable for virtually any processor use case.

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Overview

Product Description

The $159 Arty Evaluation Kit enables a quick and easy jump start for embedded applications ranging from compute-intensive Linux based systems to light-weight microcontroller applications. Designed around the industry’s best low-end performance per-watt Artix™ 7 35T FPGA from AMD. Arty kit features the AMD MicroBlaze™ Processor customizable for virtually any processor use case.


Key Features & Benefits

  • Artix 7 XC7A35T-L1CSG324I FPGA
  • On-chip analog-to-digital converter (XADC).
  • Programmable over JTAG and Quad-SPI Flash
  • 256 MB DDR3L with a 16-bit bus @ 667 MHz
  • 16 MB Quad-SPI Flash
  • 10/100 Mb/s Ethernet
  • USB-UART Bridge
  • Switches, Buttons, RGB LEDs
  • Four Pmod interfaces (32 I/O)
  • Arduino/ChipKit “shield” connector (49 I/O)

Featured AMD Devices

Featuring the Artix 7 XC7A35T-L1CSG324I FPGA

Logic Cells 33,280
DSP Slices 90
Memory 1,800
GTP 6.6Gb/s Transceivers 4
I/O Pins 250
Artix-7 Chip

Product Information

Specifications

Board Features

Featuring the Artix 7 35T Arty FPGA Evaluation Kit

Arty Evaluation Base Board
What's Inside

What's Inside

Arty Evaluation Board

Full seat Vivado™ Design Suite: Design Edition

Node locked & Device-locked to the Artix 7 XC7A35T FPGA, with 1 year of updates

USB Cable

Resources

Documentation
Title Board Rev Tools Version Doc Type Date
Quick Start Guide 1.0 2015.2 User Guide  9/30/15
ARTY Board User Guide 1.0   User Guide  9/30/15
Out-of-Box GPIO Demo Design 1.0 2015.2 Example Design  9/30/15
QSPI SREC Bootloader Design 1.0 2015.2 Example Design  9/30/15
EthernetLite LWIP Design 1.0 2015.2 Example Design  9/30/15
ARTY Schematics 1.0   Board Files 9/30/15
ARTY Block Diagram 1.0   Board Files 9/30/15
Tools & IP

Design Tools

Name Description License Type
Vivado Design Suite: Design Edition The AMD Vivado™ Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for FPGAs and SoCs. Node locked & Device-locked to the Artix 7 XC7A35T FPGA, with 1 year of updates
Training & Support