SmartLynq+ Module

SmartLynq is a high performance JTAG cable for high-speed FPGA and flash programming, hardware and software debug, performance analysis, and event trace.

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Overview

Product Description

The SmartLynq+ module is built for high-speed debug and trace, primarily targeting designs using Versal™ platform. The SmartLynq+ modules provide up to 28X faster Linux download time via high-speed debug port (HSDP) and much-improved configuration throughput performance over previous debug products to accelerate the development cycle. The SmartLynq+ module supports both serial and parallel trace, with up to 14GB of trace memory to capture a detailed picture of design execution history.

The SmartLynq+ module is fully compatible with Versal™ ACAP evaluation boards so that users have full visibility to the Versal architecture, including AI Engines, programmable network on chip (NoC), DDR memory controller, and 100G multirate Ethernet cores.

The SmartLynq+ module features various host and target connectivity options, making it the most flexible debug product in the portfolio. Software packages, with Python for the integrated debugger, provide maximum flexibility by enabling remote access and sharing.


Key Features & Benefits

Super-Fast Download Speed

  • 28X faster Linux download to Versal™ devices vs. SmartLynq data cable
  • Iterations reduced from minutes to seconds
  • Maximize development productivity by faster configuration time

High-Speed Trace with Enhanced Visibility

  • 100X faster egress data capture vs. JTAG​
  • Industry’s largest trace memory (up to 14GB) to capture execution history
  • 10Gb/s serial and 3.2Gb/s parallel trace capability
  • Continuous debug & trace visibility during boot

Full Visibility for Heterogeneous Architecture

  • In-depth debug for Versal architecture, including AI Engines
  • Cohesive and time-correlated debug of all subsystems
  • Daisy-chain mode to debug multiple devices on a single board

Flexible and Smart Debug Platform

  • Smart filtering with software customizable built-in debugger for remote access and sharing
  • A range of host and target connectivity options
Comparison Metric Platform Cable USB II SmartLynq Data Cable SmartLynq+ Module
Device Programming and Hardware Debug Y Y Y
Basic Software Debug Y Y Y
High-speed Debug Capability N N Y (up to 10Gb/s)
OS / Hypervisor Aware Debug N Y Y
Trace Capability N N Y
Remote Access / Debug Capability N Y Y
USB Host Interface Y (USB 2.0) Y (USB 2.0) Y (USB 3.0)
10/100/1000 Ethernet Host Interface N Y Y
Default Bitstream Programming Speed (MB/s) 0.4 4 4
JTAG Max Clock Speed (MHz) 24 40 100
Connection to Target via PC4 JTAG or Flying Wire Adapter Cable (provided) Y Y Y
GPIO Available with Flying Lead Cable (provided) N Y Y
Hardware Server Application On Host Local to Cable Local to Cable

Product Information

Specifications

Board Features

SmartLynq+
Board Specifications Value
Dimensions 6 x 6 x 2 inch (15 x 15 x 5 cm)
Operating Environmental Temperature 10°C to +26°C ambient
Memory
DDR4 Memory 16GB
Micro SD Card 16GB
eMMC 16GB
Host Interfaces
USB 3.0 (USB Type-B connector) 1
Gigabit Ethernet (RJ-45) 1
Target Interfaces
GPIO (8-pin interface on 12-pin connector) 1
JTAG (14-pin connector - PC4) 1
HSDP (USB Type-C connector) 1
Mictor (38-pin ETM) 1
Display
OLED Screen Yes
Mode Select Switch Yes
LEDs 2 (Power and Status Indicator)
Navigation Buttons 3 (Up, Down, and Select)
Reset Yes
Boot Options
SD Boot Yes
eMMC Boot Yes
Power
12V Power Adapter Yes
What's Inside
SmartLynq+-inside

Resources

Documentation
Default Default Title Document Type Date
Getting Started

Step 1. Before you set up the SmartLynq+ module

  • Ensure that you either have the Vivado® Design Suite HW Manager or a terminal interface like Tera Term or PuTTY available. If not, please download either one of them.

Step 2. Prepare the micro SD card

  • Download the latest version of the image and write it to the micro SD card provided with the kit

Step 3. Follow setup instructions and run the Embedded Design Tutorial (EDT)

  • Follow the setup instructions provided in the User Guide
  • Download the Versal embedded design tutorial to walk through the basics of HSDP with the SmartLynq+ module

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