Performance and Resource Utilization for UHD-SDI Audio v2.0

Vivado Design Suite Release 2021.2

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Kintex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
C_AUDIO_FUNCTION
C_LINE_RATE
C_MAX_AUDIO_CHANNELS
C_INCLUDE_AXILITE
C_AES_CHAN_STAT_EXT
C_SDI_AUD_STAT_EXT
C_ENABLE_CHANNEL_PADDING
C_ENABLE_CLOCK_PHASE
C_ENABLE_PER_GROUP_AXIS
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku025 ffva1156 1 test_wEmbed_TimChar2_12Gsdi_32Ch_ku Embed 12G_SDI_8DS 32 true true true true s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk 354 5899 8689 0 2 1 PRODUCTION 1.25 12-04-2018
xcku025 ffva1156 1 test_wEmbed_TimChar8_12Gsdi_32Ch_zup Embed 12G_SDI_8DS 32 true true true true s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk 354 5899 8689 0 2 1 PRODUCTION 1.25 12-04-2018
xcku025 ffva1156 1 test_wExtract_TimChar2_12Gsdi_32Ch_ku Extract 12G_SDI_8DS 32 true true true true true m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk 405 3651 6639 0 1 4 PRODUCTION 1.25 12-04-2018

Kintex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
C_AUDIO_FUNCTION
C_LINE_RATE
C_MAX_AUDIO_CHANNELS
C_INCLUDE_AXILITE
C_AES_CHAN_STAT_EXT
C_SDI_AUD_STAT_EXT
C_ENABLE_CHANNEL_PADDING
C_ENABLE_CLOCK_PHASE
C_ENABLE_PER_GROUP_AXIS
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku3p ffva676 1 test_wEmbed_TimChar3_12Gsdi_32Ch_kup Embed 12G_SDI_8DS 32 true true true true s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk 535 6151 8689 0 2 1 PRODUCTION 1.28 02-27-2020
xcku3p ffva676 1 test_wEmbed_TimChar4_12Gsdi_32Ch_v7 Embed 12G_SDI_8DS 32 true true true true s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk 535 6151 8689 0 2 1 PRODUCTION 1.28 02-27-2020
xcku3p ffva676 1 test_wExtract_TimChar3_12Gsdi_32Ch_kup Extract 12G_SDI_8DS 32 true true true true true m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk 565 3799 6638 0 1 4 PRODUCTION 1.28 02-27-2020
xcku3p ffva676 1 test_wExtract_TimChar4_12Gsdi_32Ch_v7 Extract 12G_SDI_8DS 32 true true true true true m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk 565 3799 6638 0 1 4 PRODUCTION 1.28 02-27-2020

Virtex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
C_AUDIO_FUNCTION
C_LINE_RATE
C_MAX_AUDIO_CHANNELS
C_INCLUDE_AXILITE
C_AES_CHAN_STAT_EXT
C_SDI_AUD_STAT_EXT
C_ENABLE_CHANNEL_PADDING
C_ENABLE_CLOCK_PHASE
C_ENABLE_PER_GROUP_AXIS
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu065 ffvc1517 1 test_wEmbed_TimChar5_12Gsdi_32Ch_vu Embed 12G_SDI_8DS 32 true true true true s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk 361 5957 8685 0 2 1 PRODUCTION 1.27 12-04-2018
xcvu065 ffvc1517 1 test_wExtract_TimChar5_12Gsdi_32Ch_vu Extract 12G_SDI_8DS 32 true true true true true m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk 398 3629 6639 0 1 4 PRODUCTION 1.27 12-04-2018

Virtex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
C_AUDIO_FUNCTION
C_LINE_RATE
C_MAX_AUDIO_CHANNELS
C_INCLUDE_AXILITE
C_AES_CHAN_STAT_EXT
C_SDI_AUD_STAT_EXT
C_ENABLE_CHANNEL_PADDING
C_ENABLE_CLOCK_PHASE
C_ENABLE_PER_GROUP_AXIS
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu3p ffvc1517 1 test_wEmbed_TimChar6_12Gsdi_32Ch_vup Embed 12G_SDI_8DS 32 true true true true s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk 499 6060 8689 0 2 1 PRODUCTION 1.27 02-28-2020
xcvu3p ffvc1517 1 test_wEmbed_TimChar7_12Gsdi_32Ch_z7 Embed 12G_SDI_8DS 32 true true true true s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk 499 6060 8689 0 2 1 PRODUCTION 1.27 02-28-2020
xcvu3p ffvc1517 1 test_wExtract_TimChar6_12Gsdi_32Ch_vup Extract 12G_SDI_8DS 32 true true true true true m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk 573 3804 6639 0 1 4 PRODUCTION 1.27 02-28-2020
xcvu3p ffvc1517 1 test_wExtract_TimChar7_12Gsdi_32Ch_z7 Extract 12G_SDI_8DS 32 true true true true true m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk 573 3826 6639 0 1 4 PRODUCTION 1.27 02-28-2020
xcvu3p ffvc1517 1 test_wExtract_TimChar8_12Gsdi_32Ch_zup Extract 12G_SDI_8DS 32 true true true true true m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk 573 3826 6639 0 1 4 PRODUCTION 1.27 02-28-2020

Zynq UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
C_AUDIO_FUNCTION
C_LINE_RATE
C_MAX_AUDIO_CHANNELS
C_INCLUDE_AXILITE
C_AES_CHAN_STAT_EXT
C_SDI_AUD_STAT_EXT
C_ENABLE_CHANNEL_PADDING
C_ENABLE_CLOCK_PHASE
C_ENABLE_PER_GROUP_AXIS
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xczu25dr ffvg1517 2 test_wEmbed_ResChar1_3Gsdi_4Ch Embed 3G_SDI 4 true false false false s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk=149 N/A NOT FOUND 1529 1623 0 1 1 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wEmbed_ResChar2_12Gsdi_4Ch Embed 12G_SDI_8DS 4 true false false false s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk=297 N/A NOT FOUND 1576 1623 0 1 1 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wEmbed_ResChar3_12Gsdi_16Ch_Config1 Embed 12G_SDI_8DS 16 true false false false s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk=297 N/A NOT FOUND 1927 2149 0 1 1 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wEmbed_ResChar4_12Gsdi_16Ch_Config2 Embed 12G_SDI_8DS 16 true true true false s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk=297 N/A NOT FOUND 2381 3602 0 1 1 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wEmbed_ResChar5_12Gsdi_16Ch_Config3 Embed 12G_SDI_8DS 16 true true true true s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk=297 N/A NOT FOUND 3386 5266 0 1 1 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wEmbed_ResChar6_12Gsdi_32Ch_Config1 Embed 12G_SDI_8DS 32 true false false false s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk=297 N/A NOT FOUND 2920 3332 0 2 1 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wEmbed_ResChar7_12Gsdi_32Ch_Config2 Embed 12G_SDI_8DS 32 true true true false s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk=297 N/A NOT FOUND 3611 5337 0 2 1 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wEmbed_ResChar8_12Gsdi_32Ch_Config3 Embed 12G_SDI_8DS 32 true true true true s_axi_aclk=200 s_axis_clk=300 sdi_embed_clk=297 N/A NOT FOUND 5631 8619 0 2 1 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wExtract_ResChar1_3Gsdi_4Ch Extract 3G_SDI 4 true false false false false m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk=149 N/A NOT FOUND 886 1717 0 2 2 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wExtract_ResChar2_12Gsdi_4Ch Extract 12G_SDI_8DS 4 true false false false false m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk=297 N/A NOT FOUND 888 1717 0 2 2 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wExtract_ResChar3_12Gsdi_16Ch_Config1 Extract 12G_SDI_8DS 16 true false false false false m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk=297 N/A NOT FOUND 1275 2332 0 5 2 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wExtract_ResChar4_12Gsdi_16Ch_Config2 Extract 12G_SDI_8DS 16 true true true false false m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk=297 N/A NOT FOUND 1738 3784 0 5 2 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wExtract_ResChar5_12Gsdi_16Ch_Config3 Extract 12G_SDI_8DS 16 true true true true false m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk=297 N/A NOT FOUND 2284 4676 0 6 2 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wExtract_ResChar6_12Gsdi_32Ch_Config1 Extract 12G_SDI_8DS 32 true false false false false m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk=297 N/A NOT FOUND 1685 2954 0 5 4 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wExtract_ResChar7_12Gsdi_32Ch_Config2 Extract 12G_SDI_8DS 32 true true true false false m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk=297 N/A NOT FOUND 2378 4958 0 5 4 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wExtract_ResChar8_12Gsdi_32Ch_Config3 Extract 12G_SDI_8DS 32 true true true true false m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk=297 N/A NOT FOUND 3397 6568 0 6 4 PRODUCTION 1.29 12-02-2020
xczu25dr ffvg1517 2 test_wExtract_ResChar9_12Gsdi_32Ch_Config4 Extract 12G_SDI_8DS 32 true true true true true m_axis_clk=300 s_axi_aclk=200 sdi_extract_clk=297 N/A NOT FOUND 3534 6637 0 1 4 PRODUCTION 1.29 12-02-2020

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