Creating an SDSoC Application

An SDSoC™ application can be created through the SDx™ IDE or by using a command line interface. In this chapter, the SDx IDE shows how to create a workspace, generate an application project for a selected platform, and use the available application templates. Working with code, adjusting hardware accelerator settings and targeting either emulation or a board is also covered. Excerpts of how to perform the IDE operations using command line equivalents is interspersed with the GUI illustrations.

Using an SDx Workspace

IMPORTANT: Linux host is strongly recommended for SDSoC™ platform development, and required for creating a platform supporting a target Linux OS.
  1. Launch the SDx™ IDE directly from the desktop icon or from the command line by one of the following methods:
    • Using either of the following commands from the command prompt:



      sdx -workspace <workspace_name>

    • Double-clicking the SDx icon to start the program.
    • Launching from the Start menu in the Windows operating system.
  2. The SDx IDE opens and prompts you to select a workspace, as shown in the following figure.

    Figure: Specify the SDx Workspace

IMPORTANT: When opening a new shell to enter an SDx command, ensure that you first source the settings64 and setup scripts to set up the tool environment. On Windows, run the settings64.bat file from the command shell. See the SDSoC Development Environment Release Notes, Installation, and Licensing Guide for more information.

The SDx workspace is the folder that stores your projects, source files, and results while working in the tool. You can define separate workspaces for each project or have workspaces for different types of projects. The following instructions show you how to define a workspace for an SDSoC project.

  1. Click the Browse button to navigate to, and specify, the workspace, or type the appropriate path in the Workspace field.
  2. Select the Use this as the default and do not ask again check box to set the specified workspace as your default choice and eliminate this dialog box in subsequent uses of SDx.
  3. Click Launch.
    TIP: You can change the current workspace from within the SDx IDE by selecting File > Switch Workspace.

You have now created an SDx workspace and can populate the workspace with projects. Platform and application projects are created to describe the SDx tool flow for creating an SDSoC platform.

The SDx IDE can populate the workspace with three types of user selected project types:
  • Application Project
  • Platform Project
  • Library Project
The following sections describe how to use the Platform and Application project types while constructing the example SDSoC platforms.

Creating an Application Project

TIP: Example designs are provided with the SDSoC tool installation, and also on the Xilinx GitHub repository. See Getting Started with Examples for more information.
  1. After launching the SDx IDE you can create a new Project. Select File > New > SDx Application Project, or if this is the first time the SDx IDE has been launched, you can select Create Application Project on the Welcome screen.
  2. The Create a New SDx Application Project wizard opens.
  3. In the Create a New SDx Application Project page, you can specify the project name as shown. Specify the name of the project in the Project name field.

    Figure: Create a New SDx Application Project

  4. The Use default location is selected by default to locate your project in a folder in the SDx workspace. You can uncheck this check box to specify that the project is created in a Location of your choice.
  5. If you specify the location, you can use Choose file system to select the default file system, JSch, or enable the Eclipse Remote File System Explorer (RSE).
    IMPORTANT: The project location cannot be a parent folder of an SDx workspace.
  6. Click Next.

The Platform dialog box, similar to the one shown in the following figure, displays the available installed platforms. For installing additional platforms, see the "Installing Platform-Specific Packages" section in SDAccel Environment Release Notes, Installation, and Licensing Guide (UG1238).

IMPORTANT: Be sure to select the right platform for your project, as subsequent processes are driven by this choice.

Figure: Specify SDSoC Platform

A platform is composed of a shell, which describes the base hardware design, the meta-data used in attaching accelerators to declared interfaces, and the software environment, which can include operating system images (for example, Linux), as well as boot-up and runtime files.

The SDSoC development environment offers base-platforms for specific boards based on the following:

  • Zynq®-7000
    • zc702
    • zc706
  • Zynq UltraScale+™ MPSoC
    • zcu102
    • zcu104
    • zcu106
    • zed

You can add custom defined or third-party platforms into a repository. See Managing Platforms and Repositories for more information.

  1. Select the target platform for your project from the listed platforms. A series of actions are also available in this Platform dialog through the five icons immediately above the platform list. From left-to-right, clicking an icon invokes a platform text string search, adding a custom platform, managing a platform repository, adding new devices or platforms, and listing additional information about a selected platform.
  2. Select one of the predefined, installed platforms and click Next.
  3. The System configuration page opens, as shown in the following figure. Select System configuration and Runtime from a list of those defined for the selected platform. The System Configuration defines the software environment that runs on the hardware platform. It specifies the operating system and the available runtime settings for the processors in the hardware platform.

    Figure: Specify System Configuration

  4. When setting the system configuration, you can also check the Domain and specify a Linux Root File System if a Linux-based configuration is selected. The Linux Root File System is a sysroot directory structure that provides the necessities for a system to run and locate headers.
  5. After selecting the System Configuration and clicking Next, the Templates page displays, as shown in the following figure. Specify an application template for your new project. The samples directory within the SDx tools installation contains multiple source code example templates.
  6. Initially, you have the option in the Template dialog box of an Empty Application or one of the provided application templates. You can download additional SDx examples or update the installed examples by clicking the SDx Examples button, which retrieves content from the Xilinx GitHub as discussed in Getting Started with Examples.

    Figure: Application Templates

  7. You can use the template projects as examples to learn about the SDx tool and acceleration kernels or as a foundation for your new project. Note that you must select a template. You can select Empty Application to create a blank project into which you can import files and build your project from scratch.
  8. Click Finish to close the New SDx Project wizard and open the project.

Importing a Project

A previously exported project can be used as the source for a new project.
  1. Select File > Import menu and click Xilinx > SDx Project, or go directly through the Import Project selection on the Welcome screen.

    Figure: Select an SDx Project

  2. Chose the import type as an SDx project exported zip file which opens up a dialog for browsing to the exported zip file. Click Next.

    Figure: Import Type

  3. Select and click Open provides a list of Application projects that can be brought into the workspace.
    Note: Xilinx recommends using SDx exported zip files to move projects between workspaces. Also, this is the last SDx release, so use the import sources as opposed to the remote sources.

Working with Code

The SDx environment provides a GUI-based IDE as well as command line control to invoke the sds++ system compiler with user-specified command options from a shell prompt.

Application code generally consists of C/C++ source files, C/C++ header files, and libraries created for shared or static use. The SDx tools help you identify and convert C/C++ source code functions into hardware accelerators. By analyzing function arguments, argument types, and any applied directives or pragmas, the SDx tools generate data movers and pipelined dataflows to feed data into and out of an accelerator. Typical data sources and data sinks are memories and I/O streams.

The SDSoC-generated accelerators reside in the PL and need to fit in the PL resources. See Execution Model of an SDSoC Application. The interfaces between the PS and PL are user-configurable. For instance, SDx tools automatically generate data movers for crossing the PS-PL boundary with interface direction as set by your C/C++ source code.

Source files to create an SDx application with example SDx pragmas are provided within the IDE by selecting Xilinx > SDx Examples. Additional examples are available for download from the SDSoC Examples GitHub.

Importing Sources

Importing C/C++ Sources

  1. To add files in the Project Explorer, right-click the src folder and select the Import Sources command.
    IMPORTANT: When you import source files into a workspace, it copies the files into the workspace (by default, you can deselect it). Any changes to the files are lost if you delete the workspace.
  2. This displays the Import dialog box that enables you to specify the source of the files from which you are importing. The different sources include importing from archives, from existing projects, from the file system, and from a Git repository. Select the source of files to import and click Next.
  3. The displayed dialog box depends on the source of files you selected in the prior step. In the following figure, the File system dialog box shows the result of choosing to import sources from the file system.

    Figure: Import File System Sources

  4. The File system dialog box allows you to navigate to a folder in the system and select files to import into your project. You can specify files from multiple folders and specify the folder to import files into.
    TIP: Having each hardware accelerator function exist in a separate file enables parallel compilation of the accelerator, thereby speeding up the compilation time in SDx.
  5. In the Options, select the Overwrite existing resource without warning check box to overwrite any existing files, and select the Create top-level folder check box to have the files imported into a directory structure that matches the source file structure.
    Note: If this check box is not enabled, which is the default, then the files are imported into the folder listed in the Into folder option.
  6. On the Windows operating system, you can add files to your project by dragging and dropping them from the Windows Explorer. Select files or folders in the Explorer and drop them into the src folder, or another appropriate folder in the SDx IDE Project Explorer. When you perform this, the tool prompts you to specify how to add the files to your project, as shown in the following figure.

    Figure: File and Folder Operation

  7. You can copy files and folders into your project, add links to the files, or link to the files in virtual folders to preserve the original file structure. There is also a link to the Configure Drag and Drop Settings option, which allows you to specify how the tool should handle these types of drag and drop operations by default. You can also access these settings through the Windows > Preferences menu command.
  8. After adding source files to your project, you are ready to begin configuring, compiling, and running the application.
    Note: When you make code changes, including changes to hardware functions, it is valuable to rerun a software-only compile to verify that your changes did not adversely change your program. A software-only compile is much faster than a full-system compile.

Importing C-Callable IP Libraries

In addition to C/C++ source files, you can incorporate pre-existing hardware functions in your design with use of a C-Callable IP library, that is published as an Arm® .a static library file. Code examples that use C-Callable IP are available in the SDSoC installation tree under the samples/rtl directory. You create and add your own C-Callable IP libraries through the SDx IDE.
Note: The static library (.a files) might need to be rebuilt for the appropriate Arm processor (Cortex™-A9 or Cortex-A53) before adding it to the project. Add the associated header file (.h) for the C-Callable IP function to the project, as follows:
  1. In the Project Explorer, right-click the application name or its project.sdx file and select Properties.
  2. Select C/C++ Build > Settings > SDS++ Linker > Libraries.
  3. Add <libname_without_leading_lib_text_characters> to the -l libraries list.
  4. Add the directory that contains the <libname.a> object file to the-L Library search path.
  5. Click Apply.
  6. Click OK.
  7. Ensure that a C-Callable IP header (.h/.hpp) file is present in project source tree.
  8. Build the project.
See C-Callable IP Libraries for more information on creating and using C-Callable IP libraries.

Selecting Functions for Hardware Acceleration

The first task is to identify portions of application code that are suitable for implementation in hardware, and that significantly improve the overall application performance when run in hardware.

Before marking any functions for acceleration you should profile the software. Self-contained compute intensive functions with limited external control logic are good starting points, especially when its possible to stream data between hardware, the CPU, and memory to overlap the computation with the communication. You can build and run your application on one of the platforms provided in the SDSoC environment install to identify compute intensive functions on the Arm processor.

Every base platform included in the SDSoC environment includes a pre-built SD card image from which you can boot and run your application code if you do not have any functions selected for acceleration on the hardware platform. Running the application this way enables you to profile the original application code to identify candidates for acceleration.

See Profiling and Optimization for more information on profiling your application. Also, the SDSoC Environment Profiling and Optimization Guide (UG1235) provides more extensive detail.

After determining the function or functions to move into hardware, with a project, you can select the function from the Add Hardware Functions portion of the window.

TIP: If the Editor Area window is not open, you can double-click the <project>.sdx file in the Project Explorer to open it, or you can select Add Hardware Function from the context menu that is available when you right-click the project.

Click the Hardware Functions button of the Project Editor window to display the list of candidate functions within your program. This displays the Add Hardware Functions dialog box, that lets you select one or more functions from a list of functions in the call graph of the main function by default.

Figure: Add Hardware Functions Dialog Box

From within the Add Hardware Functions dialog box, select one or more functions for hardware acceleration and click OK.

The list of functions starts at the Root function as defined in the Options panel of the Project window and is set to main by default. You can change the Root function by clicking the Browse () command and selecting an alternate root.

The functions display in the Hardware Functions panel of the SDx Application Project Settings window as shown in the following figure.

Figure: Hardware Function Panel

TIP: If you do not see a function that you expect in the Add Hardware Function dialog box, navigate to its source file in the Project Explorer window, expand the outline of the source, right-click the function and select Toggle HW/SW.

When moving a function optimized for CPU execution into programmable logic, you can usually revise the code to improve the overall performance. See the "Programming Hardware Functions" section in the SDSoC Environment Programmers Guide (UG1278).

For accelerators using the xfOpenCV library, right-click and select Toggle Hardware from the associated header files in the project included in Project Explorer. See the Xilinx OpenCV User Guide for more information.

Selecting Clock Frequencies

After selecting hardware functions, it could be necessary to select the clock frequency for running the function or the data motion network clock.

Every platform supports one or more clock sources, which is defined by the platform developer as described in SDSoC Environment Platform Development Guide. Setting the clock frequency of the hardware function determines the clock setting for the hardware function's logic as well as its associated data mover. Setting the clock frequency of the Data Motion network determines the clock used for the axi_lite control buses. By default, the Data Motion network shares its clock with the hardware accelerator generated during system generation. You can select the Data Motion network clock and the hardware function clock from the SDx IDE or the command line.

You can view the available platform clocks by selecting the Platform link in the General option of the SDx Application Project Settings window. This displays details of the platform, including the available clock frequencies.

Figure: SDx IDE – General

IMPORTANT: Be aware that it might not be possible to implement the hardware system with some faster clock selections. If this occurs, reduce the clock frequency.

The function clock displays in the SDx Application Project Settings window, in the Hardware Functions panel.

Select a function from the list, like madd in the figure below, and click in the Clock Frequency column to access the pull-down menu to specify the clock frequency for the function.

Figure: Select Function Clock Frequency

To specify the Data Motion clock frequency, select the Data motion network clock frequency pull-down menu in the Options panel of the SDx Application Project Settings window. The Data Motion network clock frequency menu is populated by the available clocks on the platform.

Figure: Data Motion Network Clock Frequency

Command Line Options

You can set clock frequencies for either the Hardware Accelerator or the Data Motion network at the command line, as shown in the following examples.

Set the clock frequency for a function from the command line, by specifying the Clock ID (clkid).

$ sds++ -c mmult.cpp -o mmult.o -sds-pf zcu102 -sds-hw mmult mmult.cpp -clkid 1 -sds-end
To set the clock frequency for a hardware function in a C-callable IP library, use the -ac option.
$ sds++ -lmyIpLib -ac myAc:3 -o main.elf main.o
Select a Data Motion clock frequency from the command line with the -dmclkid option. For example:
$ sds++ -sds-pf zcu102 -dmclkid 1

You can use the following command to see the available clocks for a platform, and determine the clock ID:

$ sds++ -sds-pf-info <platform_name>

As an example for the ZCU102 platform, running the sds++ -sds-pf-info zcu102 command displays the following output. The clock ID and its frequency is shown for each declared system clock. A list of available system configurations and system port interfaces is also provided.

Platform Information
Name: zcu102

 Architecture: zynquplus
       Device: xczu9eg
      Package: ffvb1156
  Speed grade: -2

System Clocks
  Clock ID   Frequency
         0    74.992500
         1    99.990000
         2   149.985000
         3   199.980000
         4   299.970000
         5   399.960000
         6   599.940000

Platform:    zcu102 (<SDx_Install_Dir>/platforms/zcu102)

A basic platform targeting the ZCU102 evaluation board, which includes
4GB of DDR4 for the Processing System, 512MB of DDR4 for the Programmable
Logic, 2x64MB Quad-SPI Flash and an SDIO card interface. More information
Available system configurations:
  a53_linux (a53_linux)
  a53_standalone (a53_standalone)
  r5_standalone (r5_standalone)
System Ports
Use the system port name in a sysport pragma, for example 
#pragma SDS data sysport(parameter_name:system_port_name)
System Port Name (Vivado BD instance name, Vivado BD port name)
ps_e_S_AXI_HPC0_FPD (ps_e, S_AXI_HPC0_FPD)
ps_e_S_AXI_HPC1_FPD (ps_e, S_AXI_HPC1_FPD)
ps_e_S_AXI_HP0_FPD (ps_e, S_AXI_HP0_FPD)
ps_e_S_AXI_HP1_FPD (ps_e, S_AXI_HP1_FPD)
ps_e_S_AXI_HP2_FPD (ps_e, S_AXI_HP2_FPD)
ps_e_S_AXI_HP3_FPD (ps_e, S_AXI_HP3_FPD)

Building the SDSoC Project

After you have added source code, identified the functions to accelerate, and selected the accelerator and data mover clock frequencies, you can build for a Hardware target or an Emulation target.

For Hardware targets, see Targeting Hardware.

For Emulation targets, see Targeting System Emulation.

The following section describes the SDx project to target a Hardware Project build.

Targeting Hardware

  1. Select the Build button () or right-click the project name and select Build Project in the Project Explorer window.
  2. Initiate a build through the Assistant window by right-clicking either the Debug [Hardware] or Release [Hardware] selections.
  3. Right-click Debug [Hardware] and, from the context menu, select Build.

    Figure: Assistant Window

    This generates a bitstream and bootable SD card image, based on the check-marked project options. The build process also produces a Compilation Log file and a Data Motion Network Report that you can access through the Assistant window.

  4. The results of the build process produce files to populate an SD card for booting and running on a target board. Using the Assistant window, the set of generated files can be viewed by right-clicking and selecting SD Card Image > Open > Open in File Browser.

    Figure: Build Results

  5. SDx creates detailed reports of the compilation process and saves those files in the Debug/_sds/reports directory. Access these files through the Project Explorer or the Assistant window. The following figure shows a Project Explorer expansion of the reports directory and a view into the sds.log compilation log file.

    Figure: Compilation Log

An excerpt of a log file showing the equivalent system compiler commands run by the IDE for creating the accelerators added as part of the matrix multiply and matrix add example, shown in the following code snippet. The -sds-pf option identifies the platform, and each accelerated function is identified by placing the function name and its defining source file between their own set of -sds-hw and -sds-end hardware function options. The accelerator clock ID is also chosen within the hardware function options by setting the -clkid option.

Compilation of function madd():

sds++ -Wall -O0 -g -I../src -c -fmessage-length=0 -MTsrc/madd.o\
 -MMD -MP -MFsrc/madd.d -MTsrc/madd.o -o src/madd.o ../src/madd.cpp\
 -sds-hw mmult mmult.cpp  -clkid 1 -sds-end\
 -sds-hw madd madd.cpp  -clkid 1 -sds-end\
 -sds-sys-config a53_linux -sds-proc a53_linux -sds-pf zcu102

Compilation of function main():

sds++ -Wall -O0 -g -I ../src -c -fmessage-length=0 -MTsrc/main.o\
 -MMD -MP -MFsrc/main.d -MTsrc/main.o -o src/main.o ../src/main.cpp\
 -sds-hw mmult mmult.cpp  -clkid 1 -sds-end\
 -sds-hw madd madd.cpp  -clkid 1 -sds-end\
 -sds-sys-config a53_linux -sds-proc a53_linux -sds-pf zcu102

Compilation of function mmult():

sds++ -Wall -O0 -g -I../src -c -fmessage-length=0 -MTsrc/mmult.o\ 
 -MMD -MP -MFsrc/mmult.d -MTsrc/mmult.o -o src/mmult.o ../src/mmult.cpp\ 
 -sds-hw mmult mmult.cpp -clkid 1 -sds-end\ 
 -sds-hw madd madd.cpp -clkid 1 -sds-end\ 
 -sds-sys-config a53_linux -sds-proc a53_linux -sds-pf zcu102

The compiled object files are then linked by the SDx tools to produce the single executable file for the matrix multiply and matrix add example containing the application code as well as the code to invoke the accelerated functions. This executable is targeted for Linux as specified with the -sds-sys-config and -sds-proc options.

Linking object files to produce an executable file (ELF) and boot files for SD card:

sds++ --remote_ip_cache /tmp/sdx_workspace/ip_cache -o project_one.elf\
 ./src/madd.o ./src/main.o ./src/mmult.o\
 -dmclkid 1 -sds-sys-config a53_linux\
 -sds-proc a53_linux -sds-pf zcu102

XP Option: Advanced Feature for Controlling a Vivado Build

While the sds++ system compiler automatically invokes the Vivado® design tools to implement the hardware system, users who are familiar with Vivado tool options have the ability to further customize the flow by passing arguments on the command line. The -xp option of the sds++ system compiler can be used to pass a parameter-value or property-value pair into the Vivado tools for guiding accelerator implementation.

The following is an example of specifying a Vivado synthesis option:

sds++ <command_options> -xp "vivado_prop:run.synth_1.STEPS.SYNTH_DESIGN.TCL.POST=<full path to postsynth.tcl>"

This example -xp option specifies a post-synthesis execution of a Vivado tool Tcl file. Multiple -xp options can be specified on a single system compiler invocation.

However, for synthesis and implementation strategies, the sds++ command directly takes the -impl-strategy and -synth-strategy options, and does not use the -xp option.

For example:

sds++ <command_options> -synth-strategy <strategy_name>
sds++ <command_options> -impl-strategy <strategy_name>
sds++ <command_options> -synth-strategy <strategy_name> -impl-strategy <strategy_name>

When using the IDE, the -xp options can be added to a build configuration as described in SDS++ Linker Settings, under the Miscellaneous options.

See the following resources for more information:

Targeting System Emulation

After the hardware functions are identified, the logic can be compiled, and the entire system (PS and PL) verified using emulation on Xilinx base platforms (such as zc702, zc706, zcu102, zcu104, and zcu106). System emulation allows you to verify and debug the system with the same level of accuracy as a full bitstream compilation, without requiring a bitstream. This can significantly reduce design iteration time, and allow faster iteration through debug cycles more.

To enable system emulation, from the Editor Area, click the Target field, and select Emulation.

Figure: Emulation Target

System emulation offers Debug and Optimized modes, which can be specified by clicking in the Emulation Model field.

Builds the system through RTL generation, and the Vivado IP integrator block design containing the hardware function, elaborates the hardware design, and runs behavioral simulation on the design, with a waveform viewer to help you analyze the results. If there is a functional issue with the code, use this option.
Runs the behavioral simulation in batch mode, returning the results without the waveform data. While Optimized can be faster, it returns less information than Debug mode.

To capture waveform data from the PL hardware emulation for viewing and debugging, select the Debug pull-down menu option. For faster emulation without capturing this hardware debug information, select Optimized.

After specifying the emulation options, click the Build () command to compile the active build configuration. The Build command invokes the system compilers to build your application project. There are two build configurations available:

This compiles the project use in software debug. The compiler produces extra information for use by a debugger to facilitate debug and allows you to step through the code.
The compiler tries to reduce code size and execution time of the application. This strips out the debug code so that you really cannot debug with this version.
TIP: Debug and Release modes describe how the software code is compiled; it does not affect the compilation and implementation of the hardware functions.

You can launch the build from the Assistant window also, by selecting Debug[Emulation] > Build.

After system emulation has completed, the Assistant lists the Data Motion Network Report and the Compilation Log as shown in the following figure:

Figure: Assistant Window Display

The build process for hardware emulation can take some time, depending on your application code, the size of your hardware functions, and the various options you have selected. To compile the hardware functions, the tool stack includes SDx, Vivado HLS, and the Vivado Simulator.

After the system is compiled for emulation, you can invoke the system emulator using the Xilinx > Start/Stop Emulator menu command or using sdsoc_emulator from the command line.

When the Start/Stop Emulator dialog box opens, if the specified emulation mode is Debug, you can choose to run emulation with or without waveforms. If the emulation mode is Optimized, the Show waveforms check-box is disabled and cannot be changed.

Figure: Start/Stop Emulator

Disabling the Show Waveform option allows you to run emulation with the output directed solely at the Emulation Console view, which shows all system messages including the results of any print statements in the source code. Some of these statements might include the values transferred to and from the hardware functions, or a statement that the application has completed successfully, which would verify that the source code running on the PL and the compiled hardware functions running in the PS are functionally correct.

Enabling the Show Waveform option provides the same functionality in the console window, plus the behavioral simulation of the PL-resident IP with a waveform window in the Xsim tool. The waveform window allows you to see the value of any signal in the hardware functions over time.

When using Show Waveform, you must manually add signals to the waveform window before starting the emulation. Use the Scopes pane to navigate the design hierarchy, then select the signals to monitor in the Object pane, and right-click to add the signals to the waveform pane. Select the Run > Run All option to start updates to the waveform window. For more information on working with the Vivado simulator waveform window, see the Vivado Design Suite User Guide: Logic Simulation (UG900).

Note: Running with RTL waveforms results in a slower runtime, but enables detailed analysis into the operation of the hardware functions.

The system emulation can also be started by selecting the active project in the Project Explorer view and right-clicking to select Run As > Launch on Emulator menu command, or the Debug As > Launch on Emulator menu command. Launching the emulator from the Debug As menu prompts you to change to the debug perspective to arrange the windows and views to facilitate debugging the project. See Understanding the SDx GUI for more information on changing perspectives.

The program output is displayed in the console tab and if the Show Waveform option is selected, you also see any appropriate response in the hardware functions in the RTL-PL waveform. During any pause in the execution of the code, the RTL-PL waveform window continues to execute and update, just like an FPGA running on the board.

The emulation can be stopped at any time using the menu option Xilinx > Start/Stop Emulator and selecting Stop.

A system emulation session with the quick emulation (QEMU) console is shown in the following figure.

Figure: QEMU Console

As shown in the following figure, the PL waveform displays if you selected the waveform option and the Run All option:

Figure: Waveform Window

The Assistant window enables you to right-click Debug > Run > Launch on Emulator (SDx Application Debugger).

You can find more information about emulation in the SDSoC Environment Debugging Guide.

TIP: To generate an example project demonstrating emulation, create a new SDx project using the Emulation Example template. The README.txt file in the project has a step-by-step guide for performing emulation on both the SDx GUI and the command line.

Building an SDSoC Library

Libraries can be used to encapsulate one or more accelerated functions into a shared or statically linked file. The SDx IDE menu selection File > New > SDx Library Project provides a means to create a library project. The shared library flow produces a library file which can be linked to an SDSoC application through the SDx IDE or the command line. The SDSoC library flow is intended for exporting a library for use with gcc/g++. Using this library, you can call the functions which are accelerated in hardware. The C-Callable IP library flow is used for linking a Vivado packaged IP block to an SDSoC application and is also described in C-Callable IP Libraries.

Figure: Specify Library Type

Shared Library

The shared library includes a Matrix Shared Library template with a multiply and add example provided with the SDx IDE. This library demonstrates how three different functions with unique entry points in the shared library can be called from a software application.

When running the results of an application build invoked through the SDx IDE, the BOOT.BIN file in the sd_card directory of the library project should be used to boot the board as it contains the accelerated hardware functions.

For command line use, an example is available in the <SDx_Install_Dir>/samples/libmatrix directory. The libmatrix example contains makefiles that demonstrate how to build static and shared libraries as well as how to use the libraries with an application.

For more information on building a shared library, see the "Building a Shared Library" section in SDSoC Environment Programmers Guide (UG1278).