This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.
Data is provided for the following device families:
Part Information | Configuration Parameters | Performance and Resource Utilization | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Device | Package | Speed Grade | Configuration Name | RESET_ACTIVE_LEVEL |
CTRL_INTERFACE_TYPE |
CTRL_ADDR_WIDTH |
STS_HIST_BUFFER_WHEN_FULL |
DP_PROTOCOL |
PROTOCOL_RESET_ACTIVE_LEVEL |
DP_AXI_ID_WIDTH |
DP_AXI_AWUSER_WIDTH |
DP_AXI_WUSER_WIDTH |
DP_AXI_BUSER_WIDTH |
DP_AXI_ARUSER_WIDTH |
DP_AXI_RUSER_WIDTH |
Clock Input | Fmax (MHz) | LUTs | FFs | DSPs | 36k BRAMs | 18k BRAMs | Speedfile Status |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 225 | 426 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 313 | 427 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 329 | 482 | 626 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 567 | 627 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 225 | 426 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 313 | 427 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 329 | 482 | 626 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 567 | 627 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 321 | 232 | 426 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 306 | 322 | 427 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 466 | 626 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 580 | 630 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 226 | 426 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 321 | 324 | 427 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 485 | 626 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 306 | 580 | 631 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 329 | 222 | 426 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 290 | 301 | 429 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 321 | 484 | 627 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
xc7k325t | fbg676 | 1 | xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 290 | 572 | 627 | 0 | 0 | 0 | PRODUCTION 1.12 2017-02-17 |
Part Information | Configuration Parameters | Performance and Resource Utilization | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Device | Package | Speed Grade | Configuration Name | RESET_ACTIVE_LEVEL |
CTRL_INTERFACE_TYPE |
CTRL_ADDR_WIDTH |
STS_HIST_BUFFER_WHEN_FULL |
DP_PROTOCOL |
PROTOCOL_RESET_ACTIVE_LEVEL |
DP_AXI_ID_WIDTH |
DP_AXI_AWUSER_WIDTH |
DP_AXI_WUSER_WIDTH |
DP_AXI_BUSER_WIDTH |
DP_AXI_ARUSER_WIDTH |
DP_AXI_RUSER_WIDTH |
Clock Input | Fmax (MHz) | LUTs | FFs | DSPs | 36k BRAMs | 18k BRAMs | Speedfile Status |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 407 | 228 | 426 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 360 | 309 | 427 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 383 | 436 | 626 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 352 | 521 | 628 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 407 | 228 | 426 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 360 | 309 | 427 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 383 | 436 | 626 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 352 | 521 | 628 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 391 | 225 | 426 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 375 | 311 | 427 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 391 | 418 | 626 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 352 | 526 | 627 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 415 | 230 | 427 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 360 | 310 | 427 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 407 | 500 | 626 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 344 | 524 | 627 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 368 | 218 | 426 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 352 | 309 | 427 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 399 | 432 | 626 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
xcku040 | fbva676 | 1 | xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 375 | 529 | 627 | 0 | 0 | 0 | PRODUCTION 1.25 12-04-2018 |
Part Information | Configuration Parameters | Performance and Resource Utilization | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Device | Package | Speed Grade | Configuration Name | RESET_ACTIVE_LEVEL |
CTRL_INTERFACE_TYPE |
CTRL_ADDR_WIDTH |
STS_HIST_BUFFER_WHEN_FULL |
DP_PROTOCOL |
PROTOCOL_RESET_ACTIVE_LEVEL |
DP_AXI_ID_WIDTH |
DP_AXI_AWUSER_WIDTH |
DP_AXI_WUSER_WIDTH |
DP_AXI_BUSER_WIDTH |
DP_AXI_ARUSER_WIDTH |
DP_AXI_RUSER_WIDTH |
Clock Input | Fmax (MHz) | LUTs | FFs | DSPs | 36k BRAMs | 18k BRAMs | Speedfile Status |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 579 | 224 | 426 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 571 | 315 | 427 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 594 | 492 | 626 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 556 | 593 | 627 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 579 | 224 | 426 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 571 | 315 | 427 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 594 | 492 | 626 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 556 | 593 | 627 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 556 | 215 | 426 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 548 | 312 | 427 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 563 | 475 | 626 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 540 | 587 | 627 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 602 | 225 | 426 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 571 | 311 | 427 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 571 | 484 | 626 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 540 | 594 | 627 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 579 | 228 | 426 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 571 | 312 | 427 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 556 | 470 | 626 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
xcku13p | ffve900 | 1 | xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 548 | 590 | 627 | 0 | 0 | 0 | PRODUCTION 1.29 05-01-2022 |
Part Information | Configuration Parameters | Performance and Resource Utilization | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Device | Package | Speed Grade | Configuration Name | RESET_ACTIVE_LEVEL |
CTRL_INTERFACE_TYPE |
CTRL_ADDR_WIDTH |
STS_HIST_BUFFER_WHEN_FULL |
DP_PROTOCOL |
PROTOCOL_RESET_ACTIVE_LEVEL |
DP_AXI_ID_WIDTH |
DP_AXI_AWUSER_WIDTH |
DP_AXI_WUSER_WIDTH |
DP_AXI_BUSER_WIDTH |
DP_AXI_ARUSER_WIDTH |
DP_AXI_RUSER_WIDTH |
Clock Input | Fmax (MHz) | LUTs | FFs | DSPs | 36k BRAMs | 18k BRAMs | Speedfile Status |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 235 | 427 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 306 | 301 | 432 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 321 | 486 | 627 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 581 | 627 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 235 | 427 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 306 | 301 | 432 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 321 | 486 | 627 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 581 | 627 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 321 | 219 | 426 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 317 | 428 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 474 | 626 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 567 | 628 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 231 | 426 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 297 | 428 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 473 | 626 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 290 | 581 | 627 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 306 | 216 | 426 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 300 | 428 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 321 | 487 | 626 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
xc7vx690t | ffg1157 | 1 | xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 321 | 579 | 627 | 0 | 0 | 0 | PRODUCTION 1.11 2014-09-11 |
Part Information | Configuration Parameters | Performance and Resource Utilization | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Device | Package | Speed Grade | Configuration Name | RESET_ACTIVE_LEVEL |
CTRL_INTERFACE_TYPE |
CTRL_ADDR_WIDTH |
STS_HIST_BUFFER_WHEN_FULL |
DP_PROTOCOL |
PROTOCOL_RESET_ACTIVE_LEVEL |
DP_AXI_ID_WIDTH |
DP_AXI_AWUSER_WIDTH |
DP_AXI_WUSER_WIDTH |
DP_AXI_BUSER_WIDTH |
DP_AXI_ARUSER_WIDTH |
DP_AXI_RUSER_WIDTH |
Clock Input | Fmax (MHz) | LUTs | FFs | DSPs | 36k BRAMs | 18k BRAMs | Speedfile Status |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 383 | 234 | 426 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 344 | 317 | 427 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 391 | 441 | 626 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 360 | 536 | 628 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 383 | 234 | 426 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 344 | 317 | 427 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 391 | 441 | 626 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 360 | 536 | 628 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 383 | 233 | 426 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 360 | 325 | 427 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 391 | 440 | 626 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 344 | 544 | 627 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 391 | 230 | 426 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 368 | 329 | 429 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 383 | 436 | 626 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 352 | 522 | 627 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 383 | 225 | 426 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 352 | 324 | 427 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 383 | 438 | 626 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
xcvu095 | ffvc1517 | 1 | xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 360 | 528 | 627 | 0 | 0 | 0 | PRODUCTION 1.26 12-04-2018 |
Part Information | Configuration Parameters | Performance and Resource Utilization | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Device | Package | Speed Grade | Configuration Name | RESET_ACTIVE_LEVEL |
CTRL_INTERFACE_TYPE |
CTRL_ADDR_WIDTH |
STS_HIST_BUFFER_WHEN_FULL |
DP_PROTOCOL |
PROTOCOL_RESET_ACTIVE_LEVEL |
DP_AXI_ID_WIDTH |
DP_AXI_AWUSER_WIDTH |
DP_AXI_WUSER_WIDTH |
DP_AXI_BUSER_WIDTH |
DP_AXI_ARUSER_WIDTH |
DP_AXI_RUSER_WIDTH |
Clock Input | Fmax (MHz) | LUTs | FFs | DSPs | 36k BRAMs | 18k BRAMs | Speedfile Status |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 610 | 226 | 426 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 571 | 302 | 427 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 587 | 484 | 626 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 540 | 573 | 627 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 610 | 226 | 426 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 571 | 302 | 427 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 587 | 484 | 626 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 540 | 573 | 627 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 579 | 226 | 426 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 532 | 311 | 427 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 556 | 486 | 626 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 516 | 585 | 627 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 563 | 220 | 426 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 563 | 316 | 427 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 602 | 497 | 626 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 493 | 568 | 627 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 563 | 221 | 426 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 493 | 307 | 427 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 594 | 501 | 626 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
xcvu11p | flga2577 | 1 | xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 540 | 580 | 627 | 0 | 0 | 0 | PRODUCTION 1.28 03-30-2022 |
Part Information | Configuration Parameters | Performance and Resource Utilization | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Device | Package | Speed Grade | Configuration Name | RESET_ACTIVE_LEVEL |
CTRL_INTERFACE_TYPE |
CTRL_ADDR_WIDTH |
STS_HIST_BUFFER_WHEN_FULL |
DP_PROTOCOL |
PROTOCOL_RESET_ACTIVE_LEVEL |
DP_AXI_ID_WIDTH |
DP_AXI_AWUSER_WIDTH |
DP_AXI_WUSER_WIDTH |
DP_AXI_BUSER_WIDTH |
DP_AXI_ARUSER_WIDTH |
DP_AXI_RUSER_WIDTH |
Clock Input | Fmax (MHz) | LUTs | FFs | DSPs | 36k BRAMs | 18k BRAMs | Speedfile Status |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 217 | 426 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 306 | 427 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 470 | 626 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 306 | 585 | 627 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 217 | 426 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 306 | 427 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 470 | 626 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 306 | 585 | 627 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 321 | 222 | 426 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 306 | 316 | 430 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 329 | 477 | 626 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 583 | 627 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 290 | 224 | 426 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 309 | 427 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 477 | 626 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 298 | 575 | 627 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 337 | 219 | 426 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 306 | 315 | 427 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 321 | 481 | 626 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
xc7z045 | fbg676 | 1 | xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 313 | 585 | 627 | 0 | 0 | 0 | PRODUCTION 1.12 2019-11-22 |
Part Information | Configuration Parameters | Performance and Resource Utilization | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Device | Package | Speed Grade | Configuration Name | RESET_ACTIVE_LEVEL |
CTRL_INTERFACE_TYPE |
CTRL_ADDR_WIDTH |
STS_HIST_BUFFER_WHEN_FULL |
DP_PROTOCOL |
PROTOCOL_RESET_ACTIVE_LEVEL |
DP_AXI_ID_WIDTH |
DP_AXI_AWUSER_WIDTH |
DP_AXI_WUSER_WIDTH |
DP_AXI_BUSER_WIDTH |
DP_AXI_ARUSER_WIDTH |
DP_AXI_RUSER_WIDTH |
Clock Input | Fmax (MHz) | LUTs | FFs | DSPs | 36k BRAMs | 18k BRAMs | Speedfile Status |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 571 | 226 | 426 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 540 | 304 | 427 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 571 | 495 | 626 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4LITE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 548 | 586 | 627 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 571 | 226 | 426 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 540 | 304 | 427 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 571 | 495 | 626 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | AXI4MM | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 548 | 586 | 627 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 618 | 228 | 426 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 540 | 307 | 427 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 594 | 480 | 626 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | GENERIC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 524 | 589 | 627 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 587 | 227 | 426 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 563 | 314 | 427 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 602 | 504 | 626 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | ICAP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 524 | 587 | 627 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new | 0 | 0 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 594 | 225 | 426 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old | 0 | 0 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 563 | 316 | 427 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new | 0 | 1 | 32 | discard_new | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 594 | 491 | 626 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
xczu4cg | fbvb900 | 1 | xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old | 0 | 1 | 32 | discard_old | USR_ACCESS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | clk | 540 | 582 | 627 | 0 | 0 | 0 | PRODUCTION 1.30 05-15-2022 |
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