Building a Design with Hardware Accelerators

To build a project and generate an executable, bitstream, and SD Card boot image:

  1. Right-click lab1 in the Project Explorer and select Build Project from the context menu that appears.
    The SDSoC™ system compiler stdout is directed to the Console tab. The functions selected for hardware are compiled using Vivado® HLS into IP blocks and integrated into a generated Vivado tools hardware system based on the selected base platform. The system compiler then invokes Vivado synthesis, place and route tools to build a bitstream, and invokes the ARM GNU compiler and linker to generate an application ELF executable file.
  2. In the SDx Project Settings window, under the Reports tab, below the Project Explorer tab, double-click to open the Data Motion Network Report.
    This report shows the connections done by the SDx environment and the types of data transfers for each function implemented in hardware. For details, see Application Code Optimization.

  3. Open the lab1/Release/_sds/swstubs/mmult.cpp file, to see how the SDx system compiler replaced the original mmult function with one named _p0_mmult_1_noasync that performs transfers to and from the FPGA using cf_send_i and cf_wait functions. The SDx system compiler also replaces calls to mmult with _p0_mmult_1_noasync in lab1/Release/_sds/swstubs/main.cpp. The SDx system compiler uses these rewritten source files to build the ELF that accesses the hardware functions.