Integral Image

The xFIntegralImage function omputes an integral image of the input. Each output pixel is the sum of all pixels above and to the left of itself.

API Syntax

template<int SRC_TYPE,int DST_TYPE, int ROWS, int COLS, int NPC=1>
void xFIntegralImage(xF::Mat<SRC_TYPE, ROWS, COLS, NPC> & _src_mat, xF::Mat<DST_TYPE, ROWS, COLS, NPC> & _dst_mat)

Parameter Descriptions

The following table describes the template and the function parameters.

Table 1. xFIntegralImage Function Parameter Descriptions
Parameter Description
SRC_TYPE Input pixel type. Only 8-bit, unsigned, 1 channel is supported (XF_8UC1)
DST_TYPE Output pixel type. Only 32-bit,unsigned,1 channel is supported(XF_32UC1)
ROWS Maximum height of input and output image (must be a multiple of 8)
COLS Maximum width of input and output image (must be a multiple of 8)
NPC Number of pixels to be processed per cycle; this function supports only XF_NPPC1 or 1 pixel per cycle operations.
_src_mat Input image
_dst_mat Output image

Resource Utilization

The following table summarizes the resource utilization of the kernel in different configurations, generated using Vivado HLS 2017.1 tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1 FPGA, to process a grayscale HD (1080x1920) image.

Table 2. xFIntegralImage Function Resource Utilization Summary
Name Resource Utilization
1 pixel
300 MHz
BRAM_18K 4
DSP48E 0
FF 613
LUT 378
CLB 102

Performance Estimate

The following table summarizes the performance of the kernel in different configurations, as generated using Vivado HLS 2017.1 tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1, to process a grayscale HD (1080x1920) image.

Table 3. xFIntegralImage Function Performance Estimate Summary
Operating Mode Latency Estimate

Operating Frequency

(MHz)

 Latency(in ms)
1pixel 300 7.2