Histogram Equalization

The equalizeHist function performs histogram equalization on input image or video. It improves the contrast in the image, to stretch out the intensity range. This function maps one distribution (histogram) to another distribution (a wider and more uniform distribution of intensity values), so the intensities are spread over the whole range.

For histogram H[i], the cumulative distribution H'[i] is given as:



The intensities in the equalized image are computed as:



API Syntax

template<int SRC_T, int ROWS, int COLS, int NPC = 1>
void xFequalizeHist(xF::Mat<SRC_T, ROWS, COLS, NPC> & _src,xF::Mat<SRC_T, ROWS, COLS, NPC> & _src1,xF::Mat<SRC_T, ROWS, COLS, NPC> & _dst)

Parameter Descriptions

The following table describes the template and the function parameters.

Table 1. xFequalizeHist Function Parameter Descriptions
Parameter Description
SRC_T Input and output pixel type. Only 8-bit, unsigned, 1 channel is supported (XF_8UC1)
ROWS Maximum height of input and output image (must be a multiple of 8)
COLS Maximum width of input and output image (must be a multiple of 8)
NPC Number of pixels to be processed per cycle
_src Input image
_src1 Input image
_dst Output image

Resource Utilization

The following table summarizes the resource utilization of the equalizeHist function for Normal Operation (1 pixel) and Resource Optimized (8 pixel) configurations, generated using Vivado HLS 2017.1 version tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1 FPGA at 300 MHz for 1 pixel and 150 MHz for 8 pixel mode.

Table 2. xFequalizeHist Function Resource Utilization Summary
Operating Mode

Operating Frequency (MHz)

 Utilization Estimate
BRAM_18K DSP_48Es FF LUT CLB
1 pixel 300 4 5 3492 1807 666
8 pixel 150 25 5 3526 2645 835

Performance Estimate

The following table summarizes a performance estimate of the equalizeHist function for Normal Operation (1 pixel) and Resource Optimized (8 pixel) configurations, generated using Vivado HLS 2017.1version tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1 FPGA at 300 MHz for 1 pixel and 150 MHz for 8 pixel mode.

Table 3. xFequalizeHist Function Performance Estimate Summary
Operating Mode Latency Estimate
Max (ms)
1 pixel per clock operation 13.8

8 pixel per clock operation

 3.4