Channel Combine

The xFmerge function, merges single channel images into a multi-channel image. The number of channels to be merged should be four.

API Syntax

template<int SRC_T, int DST_T, int ROWS, int COLS, int NPC=1>
void xFmerge(xF::Mat<SRC_T, ROWS, COLS, NPC> &_src1, xF::Mat<SRC_T, ROWS, COLS, NPC> &_src2, xF::Mat<SRC_T, ROWS, COLS, NPC> &_src3, xF::Mat<SRC_T, ROWS, COLS, NPC> &_src4, xF::Mat<DST_T, ROWS, COLS, NPC> &_dst)

Parameter Descriptions

The following table describes the template and the function parameters.

Table 1. xFmerge Function Parameter Descriptions
Parameter	Description
SRC_T	Input pixel type. Only 8-bit, unsigned, 4 channel is supported (XF_8UC1)
DST_T	Output pixel type. Only 8-bit, unsigned,1 channel is supported (XF_8UC4)
ROWS	Maximum height of input and output image (must be a multiple of 8)
COLS	Maximum width of input and output image (must be a multiple of 8)
NPC	Number of pixels to be processed per cycle; possible options are XF_NPPC1 for 1 pixel operation.
_src1	Input single-channel image
_src2	Input single-channel image
_src3	Input single-channel image
_src4	Input single-channel image
_dst	Output multi-channel image

Resource Utilization

The following table summarizes the resource utilization of the xFmerge function, generated using Vivado HLS 2017.1 tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1 FPGA, to process 4 single-channel HD (1080x1920) images.

Table 2. xFmerge Function Resource Utilization Summary
Operating Mode	Operating Frequency (MHz)	Utilization Estimate
Operating Mode	Operating Frequency (MHz)	BRAM_18K	DSP_48Es	FF	LUT	CLB
1 pixel	300	0	8	494	386	85

Performance Estimate

The following table summarizes the performance in different configurations, as generated using Vivado HLS 2017.1 tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1, to process 4 single channel HD (1080x1920) images.

Table 3. xFmerge Function Performance Estimate Summary
Operating Mode	Latency Estimate
Operating Mode	Max Latency
1 pixel operation (300 MHz)	6.92 ms