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logiVIEW Perspective Transformation and Lens Correction Image Processor

产品描述

The logiVIEW Perspective Transformation and Lens Correction Image Processor IP core for video and imaging applications, using single or multiple camera imagers (sensors), removes fish eye distortions caused by extreme wide-angle field of view (FOV) lenses, makes perspective corrections (arbitrary homography transformations) and texturing on curved planes (MLUT supported non-homography transformations) to the captured video, and stitches multiple corrected video inputs in a resulting single image for the LCD display. The logiVIEW corrects multiple 30 fps or higher frame rate video inputs in real-time and can be used in different industries and applications such as medical endoscopy, pipe inspection, surveillance, automotive surround view driver assistance systems, and defense.


主要特性与优势

  • Suppots 2048x2048 and higher input and output resolutions
  • Configurable number of video inputs and outputs
  • Supports video texturing on curved planes (non-homography transformations supported by MLUTs)
  • Supports correction of fish eye lens distortions (Suitable for extreme wide-angle lenses)
  • Programmable homographic transformation matrix enables: cropping, resizing, rotating, translating, arbitrary function
  • Supports arbitrary combinations of homography trasformations on multiple video inputs
  • ARM AMBA AXI4 and AXI4-Stream compliant
  • Packaged for Xilinx Vivado Design Suite

特色技术文档

器件实现矩阵

面向此核实现范例的器件使用矩阵。联系供应商了解更多信息。

系列 器件 速度等级 工具版本 硬件验证? LUT BRAM DSP48 CMT GTx FMAX (Mhz)
Zynq-UP-MPSoC Family XCZU9EG -1 Vivado 2016.2 Y 0 8442 25 31 0 0 110
KINTEX-7 Family XC7K70T -3 Vivado 2014.4 Y 2256 5333 13 25 0 0 200
ARTIX-7 Family XC7A350T -2 Vivado 2014.4 Y 2364 5228 13 25 0 0 140
Zynq-7000 Family XC7Z020 -2 Vivado 2018.3 Y 0 16096 71 86 0 0 140

IP 质量指标

综合信息

数据创建日期 Apr 15, 2019
当前 IP 修订号 3.11
当前修订日期已发布 Apr 09, 2019
第一版发布日期 Jun 04, 2010

Xilinx 客户的生产使用情况

Xilinx 客户成功生产项目的数量 33
可否提供参考? N

交付内容

可供购买的 IP 格式 Bitstream, Netlist, Source Code
源代码格式 VHDL
是否包含高级模型? N
提供集成测试台 Y
集成测试台格式 VHDL
是否提供代码覆盖率报告? N
是否提供功能覆盖率报告? N
是否提供 UCF? UCF
商业评估板是否可用? Y
是否提供软件驱动程序? Y
驱动程序的操作系统支持 Linux, Non-OS specific

实现方案

代码是否针对 Xilinx 进行优化? Y
标准 FPGA 优化技术 Inference, Instantiation
定制 FPGA 优化技术 None
所支持的综合软件工具及版本 Xilinx XST
是否执行静态时序分析? Y
AXI 接口 AXI4
是否包含 IP-XACT 元数据? N

验证

是否有可用的文档验证计划? Yes, document only plan
测试方法 Directed Testing
断言 Y
收集的覆盖指标 None
是否执行时序验证? Y
可用的时序验证报告 N
所支持的仿真器 Mentor ModelSIM

硬件验证

在 FPGA 上进行验证 Y
所使用的硬件验证平台 logiADAK ADAS Development Kit
已通过的行业标准合规测试 N
是否提供测试结果? N
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