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logiSDHC SD Card Host Controller


The logiSDHC Secure Digital (SD) Card Host Controller IP core is designed to transfer data from the system memory to the SD card's data bus, and vice versa. Implemented DMA mechanism enables a fast data transfer requiring minimal CPU activities. The logiSDHC IP core is SD Host Controller Standard Specification Version 2.00 compliant. The IP supports non-DMA, standard DMA and Xylon's proprietary DMA transfers, and enables expansion of embedded systems based on the Xilinx FPGA devices by mass storage capabilities. To enable easier and faster integration of the logiSDHC in FPGA designs, Xylon now ships the IP core with the FatFs file system. The FatFs is a generic file system module that implements the FAT file system on small embedded systems. The original source code can be obtained from elm-chan's web site. The logiSDHC IP core is Linux OS compatible.


  • 6. Supports non-DMA, standard DMA and Xylon custom DMA data transfers
  • 5. Programmabe transfer rates up to the maximum date rate specified by the standard
  • 2. Supports Standard and High Capacity SD cards
  • 1. Host Controller compliant with Secure Digital Specifications Version 2.00
  • 3. Linux OS compatible
  • 4. Delivered with the file system




系列 器件 速度等级 工具版本 硬件验证? LUT BRAM DSP48 CMT GTx FMAX (Mhz)
Zynq-UP-MPSoC Family XCZU9EG -1 Vivado 2018.3 Y 0 1317 2 0 0 0 100
KINTEX-7 Family XC7K325T -1 Vivado 2018.3 Y 567 1329 2 1 0 0 100
Zynq-7000 Family XC7Z020 -1 Vivado 2018.3 Y 584 1329 2 1 0 0 100
Spartan 6T Family XC6SLX75T -3 ISE 14.4 Y 730 1608 2 1 0 0 170
VIRTEX6LXT Family XC6VLX240T -3 ISE 14.1 Y 701 1581 2 1 0 0 320

IP 质量指标


数据创建日期 Oct 30, 2019
当前 IP 修订号 2.2
当前修订日期已发布 Oct 02, 2014
第一版发布日期 Mar 06, 2009

Xilinx 客户的生产使用情况

Xilinx 客户成功生产项目的数量 31
可否提供参考? N


可供购买的 IP 格式 Netlist, Source Code, Bitstream
源代码格式 VHDL
是否包含高级模型? N
提供集成测试台 Y
集成测试台格式 VHDL
是否提供代码覆盖率报告? N
是否提供功能覆盖率报告? N
是否提供 UCF? UCF
商业评估板是否可用? Y
评估板所用的 FPGA Zynq-7000
是否提供软件驱动程序? Y
驱动程序的操作系统支持 standalone


代码是否针对 Xilinx 进行优化? Y
标准 FPGA 优化技术 Instantiation, Inference
定制 FPGA 优化技术 None
所支持的综合软件工具及版本 Xilinx XST
是否执行静态时序分析? N
AXI 接口 AXI4-Lite, AXI4
是否包含 IP-XACT 元数据? Y


是否有可用的文档验证计划? No
测试方法 Both
断言 N
收集的覆盖指标 Functional
是否执行时序验证? Y
可用的时序验证报告 N
所支持的仿真器 Mentor ModelSIM


在 FPGA 上进行验证 Y
所使用的硬件验证平台 ZC702
已通过的行业标准合规测试 N
是否提供测试结果? N