产品描述

The logiSDHC Secure Digital (SD) Card Host Controller IP core is designed to transfer data from the system memory to the SD card's data bus, and vice versa. Implemented DMA mechanism enables a fast data transfer requiring minimal CPU activities. The logiSDHC IP core is SD Host Controller Standard Specification Version 2.00 compliant. The IP supports non-DMA, standard DMA and Xylon's proprietary DMA transfers, and enables expansion of embedded systems based on the Xilinx FPGA devices by mass storage capabilities. To enable easier and faster integration of the logiSDHC in FPGA designs, Xylon now ships the IP core with the FatFs file system. The FatFs is a generic file system module that implements the FAT file system on small embedded systems. The original source code can be obtained from elm-chan's web site. The logiSDHC IP core is Linux OS compatible.

特色技术文档

• logiSDHC Datasheet