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PreciseTimeBasic IEEE 1588 V2 IP Core

  • 产品编号: S-3101
  • 供应商: SoC-e
  • Certified Alliance Member

产品描述

PreciseTimeBasic is a IEEE1588-2008 V2 compliant clock synchronization IP core for Xilinx FPGAs. It is capable of accurately time stamp IEEE 1588 telegrams and also to provide a compatible time. PreciseTimeBasic IP comprises different hardware and software elements - A hardware Time Stamping Unit (TSU) capable of accurately time stamp IEEE 1588 event messages and to provide an adjustable timer with submicrosecond precision. Two versions of TSU are provided with the PreciseTimeBasic: PTB TSU and PTBLite TSU.

PTB TSU has been designed to be connected to the Medium Independent Interface ([G]MII), between MAC and PHY, parsing all the Ethernet frames and inspecting which ones are IEEE 1588. PTBLite TSU takes advantage of the PTP parser contained in the Zynq GMACs to provide a TSU usingless FPGA resources but with some limitations imposed by the IEEE 1588 hardwired logic on the PS GMAC.

With the IP, a software PTP Reference Design is also included. Additionaly, SoC-e provides a Linux kernel patch that allow accessing the TSUs using the Linux PTP Hardware Clock (PHC) subsystem.


主要特性与优势

  • IEEE 1588-2008 clock synchronization system
  • Available for Vivado and XPS
  • 100/1000 Mbps ethernet
  • PPS output
  • IRIG-B Master output
  • Compatible with different PTP SW stacks
  • OC and CB working modes
  • E2E and P2P delay mechanism
  • Supports PTP on Layer 2 (Ethernet) and Layer 3 (IPv4)
  • Support VLAN tagged PTP messages

特色技术文档

器件实现矩阵

面向此核实现范例的器件使用矩阵。联系供应商了解更多信息。

系列 器件 速度等级 工具版本 硬件验证? LUT BRAM DSP48 CMT GTx FMAX (Mhz)
Zynq-7000 Family XC7Z020 -1 Vivado 2014.4 Y 397 672 6 0 0 0 125

IP 质量指标

综合信息

数据创建日期 Mar 27, 2019
当前 IP 修订号 17.08
当前修订日期已发布 Jun 07, 2018
第一版发布日期 Dec 12, 2011

Xilinx 客户的生产使用情况

Xilinx 客户成功生产项目的数量 15
可否提供参考? Y

交付内容

可供购买的 IP 格式 Bitstream, Netlist, Source Code
源代码格式 VHDL
是否包含高级模型? N
提供集成测试台 N
集成测试台格式 VHDL
是否提供代码覆盖率报告? N
是否提供功能覆盖率报告? N
是否提供 UCF? XDC
商业评估板是否可用? Y
评估板所用的 FPGA Zynq-7000
是否提供软件驱动程序? Y
驱动程序的操作系统支持 Linux

实现方案

代码是否针对 Xilinx 进行优化? Y
标准 FPGA 优化技术 Inference
定制 FPGA 优化技术 None
所支持的综合软件工具及版本 Xilinx XST
是否执行静态时序分析? Y
AXI 接口 AXI4
是否包含 IP-XACT 元数据? Y

验证

是否有可用的文档验证计划? No
测试方法 Directed Testing
断言 N
收集的覆盖指标 Functional
是否执行时序验证? Y
可用的时序验证报告 N
所支持的仿真器 Xilinx lSim / 2015.4

硬件验证

在 FPGA 上进行验证 Y
所使用的硬件验证平台 SMARTzynq
已通过的行业标准合规测试 Y
特定的合规测试 ISPCS2011,12,13,14,15
测试日期 Dec 10, 2015
是否提供测试结果? N
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