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AR# 10033

3.1i Foundation ISE - ECS Bus pins on Core symbols do not appear as such; pin mismatch warnings result.

描述

Keywords: foundation, ise, schematic, ECS, core, symbol, bus, pin, mismatch

Urgency: Standard

General Description:
Upon placing a symbol that represents a COREGen module in an ECS schematic,
I notice that a bus pin does not appear as such. For example, an output pin that
should be labeled 'Q(3:0)' is labeled 'Q'. When running a consistency check, this
misbehavior results in a "signal count mismatch" warning.

解决方案

This problem has been fixed with the combination of:

Service Pack 2 (or greater) for 3.1i:
http://support.xilinx.com/support/techsup/sw_updates/

and

IP Update #1 (or greater) for 3.1i:
http://www.xilinx.com/ipcenter/coregen/updates.htm

Please install the service pack first, followed by the IP update. Finally,
regenerate any cores that previously suffered from this problem.
AR# 10033
日期 01/15/2003
状态 Archive
Type 综合文章
的页面