AR# 10226

3.1i Foundation ISE - Addition of a VHDL or Verilog source causes Project Navigator to hang

描述

Keywords: Project Navigator, ISE, hang, not respond, add

Urgency: Standard

General Description:
Adding a VHDL or Verilog source causes Project Navigator to hang, as in the
following example:

--synopsys translate_off

library unisims;
use unisims.all;

-- synopsys translate_on

解决方案

This problem will be fixed in the next 3.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates. The first
service pack containing the fix will be 3.1i Service Pack 4, due out in
October, 2000.
AR# 10226
日期 01/15/2003
状态 Archive
Type 综合文章