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3.x FPGA Express - Warning: Cannot link to cell "cell_name" to its reference design "component_name". (FPGA-LINK-2) --OBUFTs
Keywords: cannot, link, cell, reference, design, warning, fpga, 2
When instantiating OBUFTs in CPLDs, you may recieve the following warnings from
"Warning: Cannot link cell 'component_name' to its reference design 'OBUFT'. (FPGA-LINK-2)"
"Warning: The cell 'component_name' is not linked to any design. (FPGA-CHECK-4)"
(where 'component_name' is the instantiated name of OBUFT.)
FPGA Express does not recognize OBUFT as a CPLD primitive. The workaround
is to instantiate an OBUFE and invert the enable line.
Component declaration template:
port (E : in std_logic;
I : in std_logic;
O : out std_logic);
Module declaration template:
module OBUFE (E, I, O);
input E, I;