AR# 10509


3.1i SP5 Constraints Editor, Virtex-E - Cannot select LVCMOS18 I/O standard


General Description:

Using A3.1i_sp5, I am targeting a Virtex-E design. When I attempt to select the LVCMOS18 I/O standard in Constraints Editor, the tool allows me to select it in the drop-down menu, but I am unable to set it. As soon as I select the LVCMOS18, the box becomes grayed out and the I/O standard is not set.


To work around this problem, manually specify the I/O standard in the UCF file.

This was fixed in the 4.1i software.

AR# 10509
日期 01/18/2010
状态 Archive
Type 综合文章
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