We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 11311

3.1i CORE Generator - Dual-Port Block Memory v3_0/ v3_1 GUI displays wrong depths


Keywords: dual, port, block, memory, COREGen, CORE Generator, Virtex, out of memory

Urgency: Standard

General Description:
The following issue has been discovered with the "blkmemdp" core GUI:

When a Virtex part is selected, the valid depth range that is given in the GUI is incorrect; the displayed ranges are for Virtex-II, not Virtex.

For example, if a width of 256 is selected, the valid range for the depth is listed as 2..4096. (The correct range should be 2..2048.) This error allows the creation of cores that are possibly not supported, may not fit into the desired devices, or will be so large that there is not enough memory for them to be created.


If you are targeting Virtex and would like to use Dual-Port Block Memory v3_0 or v3_1, use the depth of 2..2048 (rather than a depth of up to 4096).
AR# 11311
日期 08/23/2002
状态 Archive
Type 综合文章