We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 11508

dup to soln 993


Keywords: Virtex-II, JTAG, TAP, reset, PROG, program, pin

Urgency: Standard

General Description:
In Virtex and Virtex-E devices, the Program pin resets the TAP controller. Does this happen with Virtex-II devices?


No, the Program pin does not reset or hold in reset the TAP controller for Virtex-II devices. JTAG is available even when the program pin is held Low.

To bring the TAP state back to Test Logic Reset, simply hold TMS high for five TCK cycles.

However, some instructions, such as "Program" and "Verify", are not available when the Program pin is held Low.
AR# 11508
日期 09/30/2008
状态 Archive
Type 综合文章