We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 1174

JTAG - Mandatory instructions defined by IEEE standard 1149.1


What are the mandatory Boundary Scan instructions defined by the IEEE 1149.1 standard?


The only JTAG instructions which are defined and required by the IEEE 1149.1 standard are BYPASS, EXTEST and SAMPLE/PRELOAD.

BYPASS is defined as all bits in the IR as all ones. EXTEST is defined as all bits in the IR as all zeros.

The standard has not designated a mandatory bit pattern for the SAMPLE/PRELOAD instruction . This is controlled by the IC manufacturer.

All other JTAG instructions are defined by the IC manufacturer and can be found in the BSDL file or in the data sheets.

AR# 1174
创建日期 08/21/2007
Last Updated 12/15/2012
状态 Active
Type 综合文章