AR# 11741


4.2i Foundation Aldec - How do I put the information from an output back on a input of the device without changing the netlist?


Keywords: Foundation, Aldec, Simulator, input, output, transfer

Urgency: Standard

General Description:
I would like to feed the output of a device back into it via a separate input. In a VHDL testbench, I would just assign a signal between these two pins. Can I do the same in the Aldec simulator?


There is no direct way to do this in the Foundation Logic simulator. However, this functionality can be achieved by writing the output to a file, then reading it back in to the input.

On each change of the output signal its value is written to a file. On the same change this value is read back from the file and assigned to the input pin.

The following is a sample command file:

watch a b output endout input
| a and b are the inputs for the first function (e.g. an and-gate)
| output is the output of the first function
| input is the input of the second function
| endout the output of the second function

wfm a 0=0 (10ns=1 10ns=0)*10
wfm b 0=0 (20ns=1 20ns=0)*5

break output ? do (check output > mytest.dat;assign input < mytest.dat )
| on each change of the signal output its value is written into 'mytest.dat'
| and read back and assigned to 'input'
sim 200ns

The drawback to this method is that the simulation will be slowed due to the file access operations; however, it is useful because the simulation can be completed without user intervention.
AR# 11741
日期 08/11/2003
状态 Archive
Type 综合文章
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