AR# 12176: 4.1i Project Navigator - Several properties cause errors on pins that use ABEL bus notation
4.1i Project Navigator - Several properties cause errors on pins that use ABEL bus notation
Keywords: ABEL, properties, bus, translate, error
General Description: Xilinx properties of the form "name=value" (such as INIT, IOSTANDARD and PWR_MODE) cause errors during the Translate process when they are applied to ABEL pins that are defined using bus notation (e.g., "BUS [3..0] q PIN;").
If these errors occur, specify the affected properties in a UCF instead of the source design.
NOTE: This does not affect pins that are defined using set notation (e.g, "[q3..q0] PIN;"), internal nodes, or properties that have no value field (e.g., "FAST").