UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 12192

4.1i Virtex-E MAP - MAP does not convert RLOC_ORIGIN to a PCF LOC constraint for single-slice RPMs

描述

Keywords: RLOC_ORIGIN , LOC, macro, RPM, place

Urgency: Standard

General Description:
RLOC_ORIGIN constraints are sometimes dropped from single comp RPM macros instead of being converted to PCF LOCATE constraints.

解决方案

This problem will be fixed in the next major release after 4.1i.

Meanwhile, a work-around is to apply a LOC constraint to one of the symbols (FF, LUT) involved. The following is an example of UCF syntax to do this:

INST "register_x" LOC = CLB_R38C72.S0 ;
AR# 12192
日期 08/20/2003
状态 Archive
Type 综合文章
的页面