UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 12667

Virtex-II/-II FPGA Pro, Virtex-4 FPGA DCM - What is the output jitter for the CLKFX? (Jitter Calculator)

描述

What is the output jitter for the CLKFX? The parameter CLKOUT_PER_JITT_FX is listed in the Data Sheet under DC and Switching Characteristics -> DCM Timing Parameters (or Output Clock Jitter). However, the value is not listed.

NOTE: You can access the data sheets at:

http://www.xilinx.com/support/documentation/index.htm

解决方案

The CLKFX jitter value depends on the frequency, the CLKFX_MULTIPLY (M) value, and the CLKFX_DIVIDE (D) value.

To obtain the value for Virtex-II FPGA, Virtex-II Pro FPGA, or Virtex-4 FPGA, use the CLKFX Jitter Calculator which is available in the Architecture Wizard.

NOTE: Generally, using CLKDV or CLK2X allows better output jitter than using CLKFX.
AR# 12667
日期 12/15/2012
状态 Active
Type 综合文章
器件
  • Virtex-II
  • Virtex-II Pro
  • Virtex-II Pro X
  • More
  • Virtex-II QPro/R
  • Virtex-4 FX
  • Virtex-4 LX
  • Virtex-4 QPro/R
  • Virtex-4 SX
  • Less
IP
  • Digital Clock Manager (DCM) Module
的页面