UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 1312

XC3000/XC4000/XC5200: PAR ERROR 4kpl:7 - Too many TBUFs (TRISTATEs) driving longline

Description

A design that uses several TBUFs driving a single node/line
is implemented in Xilinx's FPGA architectures as follows:


| | | ...... |
\~~~/ \~~~/ \~~~/ \~~~/
--\ / --\ / --\ / --\ /
| | | |
========x=======x=======x=====================x======== horizontal
longline

The TBUFs in all FPGA architectures may access only the horizontal
longlines, and each longline has a limited number of TBUFs that can
access it. The number of TBUFs that may access a horizontal longline
for a given part is listed in the Data Book.

If PAR error 4kpl:7 is referencing TBUFs, then the problem is
that you have exceeded the number of TBUFs that can drive a single
longline.

解决方案

The following design hint may or may not be practical
for your design.
Divide up your TBUFs into two of more groups, each
group driving its own node/line. Then, mux the resulting
lines together, and develop control logic to drive the
select line of the mux.



| | |
\~~~/ \~~~/ \~~~/
--\ / --\ / --\ /
| | |
========x=======x=======x=======|\
| \
| \
| | | |MUX|
\~~~/ \~~~/ \~~~/ | |---------out
--\ / --\ / --\ / | /
| | | | /
========x=======x=======x=======|/
AR# 1312
创建日期 08/31/2007
Last Updated 10/20/2008
状态 Archive
Type 综合文章