AR# 13173


LogiCORE 256-pt FFT v2.0 - Use of the 256-pt FFT v2.0 for a Virtex-II device causes PAR warnings and errors


Keywords: core, FFT, transform, slice, error

When I use a 256-pt FFT v.2 in a Virtex-II design, the following PAR warning and error are reported:

"WARNING:Place:78 - The SLICE component "fft_buf/fft/dfly/xfft4/b3/raddr/COUT1_NET_O" could not be placed.
SLICE "fft_buf/fft/dfly/xfft4/b3/raddr/COUT1_NET_O"."

"ERROR:Place:79 - There were not enough sites to place all selected components. This is probably due either to lack of resources, preference conflicts, or macro configuration placement requirements which cannot be met. If PAR has been run, please check the .par file for resource allocation and utilization and verify that there are sufficient resources to place the component(s). Also ensure that all placement conflicts have been resolved. If neither of these seem to be a problem, examine the size and shape of the macros in the design to make sure they all may placed on the device at the same time."


The problem file exists in the RLOCs (Relative Location Constraints), within the "vfft256v2.edn" implementation file.

You can work around this problem in two ways:

1. Use the MAP "-ir" option to ignore RLOCs. If this option is used, good timing constraints are necessary in order to achieve timing goals, as the tools will ignore all RLOCs.

2. A new netlist is available for this core at:

Download this file, and replace the old generated vfft256v2.edn with the new file from your current CORE Generator directory.
AR# 13173
日期 09/10/2008
状态 Archive
Type 综合文章
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