XST issues the following error for VHDL or Verilog for any type of syntax error:
"ERROR:HDLParsers:162 - file_name Line xx. Read symbol xx, expecting 'x'."
To resolve this problem, go to the line number listed in the error and double-check the VHDL/Verilog to ensure that the proper syntax is being used. The most common syntax error is a missing semicolon at the end of a VHDL/Verilog line.