AR# 14220


LogiCORE - Twos Complementer Core: Why is the output width created equal to (input width + 1)?


General Description: 
Why does the Twos Complementer core always create an output width that is one bit greater than the input width? (If the input width is "n", then output width will always be "n+1".)


The Twos Complementer accepts signed input. If the input width is "n", then the range of signed numbers the core can accept is: 
-(2^(n-1)) to +(2^(n-1)-1) 
The extra bit on the output is needed when the input is the lower limit of the range. 
For example
For n=8, the valid input range is -128 to +127 ("10000000" to "01111111").  
If the input is -128, the complement must be to +128. This requires the extension of a single bit to obtain a valid sign bit -> "010000000" (9-bits needed).
AR# 14220
日期 05/20/2014
状态 Archive
Type 综合文章
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