General Description: The following error is reported:
"WARNING:NetListWriters:108 - In order to compile this Verilog file successfully, please add $XILINX/verilog/src/glbl.v to your compile command."
This message is from NGD2VER, and it instructs you to include the "glbl.v" module for Verilog simulation to control the GSR/GTS signals. The "glbl.v" module is a library component that is not part of the Verilog netlist, but is needed to control the behavior of the GSR/GTS signals.
In the next major software release, the warning message will be changed to an "info" message as follows:
"INFO:NetListWriters - If Verilog simulation is performed outside the ISE Project Navigator environment, please add $XILINX/verilog/src/glbl.v to the simulator compile and invocation commands in order to allow proper initialization of the design. If simulation is performed within Project Navigator, this will be taken care of automatically. For more information on compiling and performing Xilinx simulation, consult the online Synthesis and Simulation Design Guide: http://www.xilinx.com/support/software_manuals.htm"