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AR# 14506

5.1i PACE - PACE is not reading the constraints from my VHDL/Verilog/NCF source code


Keyword: PACE, constraints, read, show, NCF, source, VHDL, Verilog

Urgency: Standards

General Description:
I have entered design constraints in my source code and/or NCF file, but PACE is not reading the constraints.


Currently, PACE is only able to read constraints from the UCF file. PACE does not read constraints passed on from NGD file, which contain constraints entered either from source code or the NCF file.
AR# 14506
日期 03/06/2005
状态 Archive
Type 综合文章