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AR# 14723

5.1i Architecture Wizard - I am unable to synthesize a DCM or RocketIO VHDL instantiation with Synplify (Errors are reported)


When I attempt to synthesize the instantiation template created by the DCM Wizard, the following errors are reported:


"FATAL_ERROR: Xst:Portability/export/Port_Main.h:126:1.13 - This application has discovered an exceptional condition from which it cannot recover. Process will terminate.

Error: XST failed."


"Exprmap.c:366 Compiler Error: No handler for expression bundle of type real. Probably near:

@E:"C:\temp\DCM_test.vhd": 32:49:32:51| Compiler Error - please check end of log for more information. Please call Synplicity Support (USA) at (408) 215-6000 or send email including this log and test case to support@synplicity.com."


These errors occur because certain synthesis tools are unable to handle attributes of type "real".

To work around this problem, edit the DCM instantiation. This editing must be performed in a text editor outside the ISE software, as the file is read-only inside Project Navigator. (A similar work-around can also be used for a RocketIO instantiation.)

Follow these steps to modify the DCM instantiation:

  1. Browse to the work directory.
  2. Open the <dcm_instantiation_name>.vhd in a text editor such as WordPad. (NOTE: This file appears as ".xaw" in the ISE software.)
  3. Edit the following lines:

    Under the architecture section:
    attribute CLKDV_DIVIDE : real;
    attribute CLKDV_DIVIDE of DCM_INST : label is 2.0;
    must be changed to:
    attribute CLKDV_DIVIDE : string;
    attribute CLKDV_DIVIDE of DCM_INST : label is "2.0";
    Under the component section:
    -- synopsys translate_off
    CLKDV_DIVIDE : real := 2.0;

    must be changed to:
    -- synopsys translate_off
    CLKDV_DIVIDE : string := "2.0";
  4. Save the ".vhd" file.
  5. Re-run synthesis.
AR# 14723
日期 12/15/2012
状态 Active
Type 综合文章