AR# 14864: 6.1i Virtex-II MAP - Timing tools may flag a false path through F5MUX
6.1i Virtex-II MAP - Timing tools may flag a false path through F5MUX
Keywords: timing, merge, logic corrupted, F5MUX
General Description: A timing problem exists that is sometimes mistaken for a mapping problem involving the corruption of logic. When an F5MUX is configured as a route-through with a constant on the select pin, MAP still uses the slice resources connected to the never-selected F5MUX input. The timing tools do not consider that the F5MUX path is never selected and flag timing violations on these false paths.
You may mistake these false paths as evidence of logic corruption. This problem is more likely to occur if the wide gate option (-k) is turned on, which makes frequent use of F5MUXs with this configuration.