We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 15007

Project Navigator - Why am I unable to perform operations on a VHDL Package file in my project?


Why am I not able to perform operations, such as syntax-checking, on a VHDL Package file in my project?


Project Navigator parses and checks VHDL packages when they are used by a module in a design. This is because VHDL is compile-dependent, and VHDL packages must be compiled before they are used in a module.

AR# 15007
日期 12/15/2012
状态 Archive
Type 综合文章