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AR# 15621

12.1 Timing Analyzer/Constraint - External clock skew is not correctly reported (DCM does not de-skew external clock paths)


I am using the DCM to de-skew my board, but the external clock skew is not reported correctly.


The clock skew between the DCM's clocks is not correct because one DCM drives an external clock and the other drives only an internal clock.

The new FEEDBACK Constraint must be used for the skew to be calculated correctly.

NET output_clock_net FEEDBACK = 3 ns NET input_feedback_clock_net;

AR# 15621
日期 12/15/2012
状态 Active
Type 综合文章