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AR# 15833

14.x Timing Analyzer/Constraint - How do I add a PERIOD constraint to the N-side of my differential pair?

描述

I want to use the N-side of a differential clock to drive logic in my design. I add a NET PERIOD constraint to the net name, but this does not work.

How do I constrain this net using a PERIOD constraint?

解决方案

If you add a NET PERIOD on a DIFF_CLK in the software, the constraintis lost. However, if you place a TNM_NET PERIOD on the DIFF clock input, the PERIODis placed on the N- and the P-sides of the clock.

For more details on timing constraints, please see the Timing Constraints User Guide(UG612).
AR# 15833
日期 12/15/2012
状态 Active
Type 综合文章
Tools
  • ISE Design Suite - 12.1
  • ISE Design Suite - 12.2
  • ISE Design Suite - 12.3
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  • ISE Design Suite - 12.4
  • ISE Design Suite - 13
  • ISE Design Suite - 13.1
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