We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 15934

7.1i ISE Simulator (ISim) - How do I use Waveform Editor (Bencher) for a design with differential clocks?


Keywords: HDLBencher, testbench, BUFGDS, input, multiple

Waveform Editor does not detect whether or not a clock pin is part of a differential pair. How do I use Waveform Editor to create a testbench for a design that contains a differential clock input?


In an ideal simulation, you should be able to select the P side input and ignore the N side (or have the N side automatically added as the inverse of the P side). Currently, Waveform Editor sets all input pins to an initial value. With the P side of the input clock toggling at the given frequency and the N side of the clock set to a High or Low value, the design does not recognize the clock in the simulator.

To work around this issue, toggle both the P and N sides of the differential clock:
- When you first create the testbench waveform, use the "Multiple Clocks" option.
- Choose both the P and N side clock signals as clocks.
- Associate all applicable input and output signals with the P side clock signal.
- Set the High time of the P side to match the Low time of the N side (and vice versa), and offset the N side by the length of the P side Low time.

AR# 15934
日期 10/16/2008
状态 Archive
Type 综合文章