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AR# 16407

System Generator for DSP - Why do I have disconnected ports or wires for some of the optional ports, such as the enable or reset signals, when I reopen my project?


General Description:  

Often when I reopen a project, some of the optional ports, such as the enable or reset signals, are disconnected. This causes Simulink to error out when I attempt to simulate my design. I need to reconnect the signals before simulating. The problem is consistent, so even after I reconnect the signal and save the project, the problem continues to occur.  


What can I do to fix this?


There are several things that you can do to alleviate this problem. 


The most common problem concerns the initialization of variables used in the design, such as a Memory Block depth, or the Sample Time of a block. Sometimes it is the block with the variable that has the port connection problem, and sometimes it is an upstream block that connects to the unconfigured block. 


There are two ways to work around this problem: 


1. Add a preload function to the model. This is an M-Script that ensures that the variables are initialized before the model is opened. For more information, see (Xilinx Answer 13233)


2. Put the block under a masked subsystem, and then enter the values into the masked subsystem. 


If you are updating between versions of the tool, you might need to do one of the following: 


- Delete the block and replace it with a similar block from the library. 

- You can also unlink a block from the library, check the optional ports that you will be using, and then relink it to the library. This will set the default for that block to have the optional ports turn on when you pull the block from the library.

AR# 16407
日期 05/15/2014
状态 Archive
Type 综合文章